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MAX1462 Datasheet, PDF (3/16 Pages) Maxim Integrated Products – Low-Voltage, Low-Power, 16-Bit Smart ADC
Low-Voltage, Low-Power,
16-Bit Smart ADC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.4V to 3.6V, VSS = 0, fXIN = 2MHz, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
OUTPUT DAC (Note 7)
DAC Resolution
Integral Nonlinearity
Differential Nonlinearity
UNCOMMITTED OP AMP
Op Amp Supply Current
Input Common-Mode Range
Open-Loop Gain
Offset Voltage (as Unity-Gain
Follower)
SYMBOL
CONDITIONS
INL
DNL
CMR
AV
VOS
VIN = max [(VSS + 2.3), (VDD - VSS) / 2]
(no load)
MIN TYP MAX UNITS
12
Bits
1
LSB
0.5
LSB
80
µA
VSS + 1.3
VDD - 0.9
V
60
dB
-30
30
mV
Output Voltage Swing
No load
Output Current Range
VOUT = (VSS + 0.2V) to (VDD - 0.2V)
DIGITAL INPUTS: START, CS1, CS2, SDIO (Note 8), RESET, XIN (Note 9), TEST
Input High Voltage
Input Low Voltage
Input Hysteresis
Input Leakage
Input Capacitance
DIGITAL OUTPUTS: D[11...0]
VIH
VIL
VHYST
IIN
CIN
VIN = 0 or VDD
(Note 10)
Output Voltage Low
VOL
ISINK = 200µA
Output Voltage High
VOH ISOURCE = 200µA
Three-State Leakage Current
IL
CS_ = VSS
Three-State Output Capacitance COUT CS_ = VSS (Note 10)
DIGITAL OUTPUTS: SDIO (Note 8), SDO, EOC, OUT
Output Voltage Low
Output Voltage High
VOL
VOH
ISINK = 200µA
ISOURCE = 200µA
Three-State Leakage Current
IL
Three-State Output Capacitance COUT
CS_ = VSS
CS_ = VSS (Note 10)
VSS + 0.05
VDD - 0.05
V
±200
µA
80
% VDD
20 % VDD
1.0
V
±10
µA
50.0
pF
80 % VDD
20
% VDD
±10
µA
50.0
pF
10
% VDD
90
% VDD
±10
µA
50.0
pF
Note 1: EEPROM programming requires a minimum VDD = 4.75V. IDD may exceed its limits during this time.
Note 2: This value does not include the sensor or load current. This value does include the uncommitted op amp current. Note that
the MAX1462 will convert continuously if REPEAT MODE is set in the EEPROM.
Note 3: See the Analog Front End, Including PGA, CO-DAC, ADC, and Temperature Sensor section.
Note 4: The signal input to the ADC is the output of the PGA plus the output of the CO-DAC. The reference to the ADC is VDD. The
plus full-scale input to the ADC is +VDD and the minus full-scale input to the ADC is -VDD. This specification shows the con-
tribution of the CO-DAC to the ADC input.
Note 5: See Figure 2 for ADC outputs between ±85%.
Note 6: The sensor and the MAX1462 must always be at the same temperature during calibration and use.
Note 7: The Output DAC is specified using the external lowpass filter (Figure 8).
Note 8: SDIO is an input/output digital pin. It is only enabled as a digital output pin when the MAX1462 receives from the test sys-
tem the commands 8 hex or A hex (Table 4).
Note 9: XIN is a digital input pin only when the TEST pin is high.
Note 10: Guaranteed by design. Not subject to production testing.
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