DS4520 Datasheet, PDF (7/10 Pages) Maxim Integrated Products – 9-Bit I2C Nonvolatile I/O Expander Plus Memory

9-Bit I²C Nonvolatile
I/O Expander Plus Memory
Table 1. DS4520 Memory Map
ADDRESS TYPE
NAME
FUNCTION
FACTORY
DEFAULT
00h to 3Fh EEPROM User Memory 64 bytes of general-purpose user EEPROM.
00h
40 to E7h
—
Reserved ^{Undefined address space for future expansion. Reads and writes to this}
—
space have no effect on the device.
E8 to EFh EEPROM Reserved —
—
F0h
Pullup Pullup enable for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Set
00h
Enable 0 the corresponding bit to enable the pullup; clear the bit to disable the pullup.
F1h
Pullup Pullup enable for I/O_8. I/O_8 is the LSB. Only the LSB is used. Set the LSB
00h
Enable 1 bit to enable the pullup on I/O_8; clear the LSB to disable the pullup.
SRAM
I/O control for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Clearing
Shadowed
the corresponding bit of the register pulls the selected I/O pin low; setting the
F2h
EEPROM ^{I/O Control 0 bit places the pulldown transistor into a high-impedance state. When the}
FFh
pulldown is high impedance, the output floats if no pullup/down is connected
[EEPROM
to the pin.
writes are
I/O control for I/O_8. I/O_8 is the LSB. Only the LSB is used. Clearing the LSB
F3h
disabled if
the SEE
I/O Control 1
of the register pulls the I/O_8 pin low; setting the LSB places the pulldown
transistor into a high-impedance state. When the pulldown is high impedance,
01h
bit = 1]
the output floats if no pullup/down is connected to the pin.
Configuration register. The LSB is the SEE bit. When set, this bit disables
F4h
Configuration writes to the EEPROM; writing only affects the shadow SRAM. When set to 0,
00h
both the EEPROM and the shadow SRAM is written.
F5h to F7h
User Memory 3 bytes of general-purpose user EEPROM.
00h
I/O status for I/O_0 to I/O_7. I/O_0 is the LSB and I/O_7 is the MSB. Writing to
F8h
I/O Status 0 this register has no effect. Read this register to determine the state of the
I/O_0 to I/O_7 pins.
SRAM
I/O status for I/O_8. I/O_8 is the LSB. Only the LSB is used; the other bits
—
F9h
I/O Status 1 could be any value when read. Writing to this register has no effect. Read this
register to determine the state of the I/O_8 pin.
FAh to FFh
SRAM User 6 bytes of general-purpose SRAM.
MSB
LSB
1 0 1 0 A2 A1 A0 R/W
SLAVE
ADDRESS*
*THE SLAVE ADDRESS IS DETERMINED BY
ADDRESS PINS A0, A1, AND A2.
READ/WRITE
BIT
Figure 1. DS4520 Slave Address Byte
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