DS4520 Datasheet, PDF (3/10 Pages) Maxim Integrated Products – 9-Bit I2C Nonvolatile I/O Expander Plus Memory

9-Bit I²C Nonvolatile
I/O Expander Plus Memory
AC ELECTRICAL CHARACTERISTICS (See Figure 2)
(V_CC = +2.7V to +5.5V; T_A = -40°C to +85°C, unless otherwise noted. Timing referenced to V_IL(MAX) and V_IH(MIN).)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
SCL Clock Frequency
f_SCL (Note 5)
0
400
Bus Free Time Between Stop and
Start Conditions
t_BUF
1.3
Hold Time (Repeated) Start
Condition
t_HD:STA
0.6
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
Start Setup time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Setup Time
SDA and SCL Capacitive Loading
EEPROM Write Time
t_LOW
t_HIGH
t_HD:DAT
t_SU:DAT
t_SU:STA
t_R
t_F
t_SU:STO
C_B
t_WR
(Note 6)
(Note 6)
(Note 6)
(Note 7)
1.3
0.6
0
0.9
100
0.6
20 + 0.1C_B
300
20 + 0.1C_B
300
0.6
400
10
20
UNITS
kHz
µs
µs
µs
µs
µs
ns
µs
ns
ns
µs
pF
ms
NONVOLATILE MEMORY CHARACTERISTICS
(V_CC = +2.7V to +5.5V, unless otherwise noted.)
PARAMETER
EEPROM Writes
SYMBOL
CONDITIONS
+70°C (Note 4)
MIN
TYP
50,000
MAX
UNITS
Note 1: All voltages referenced to ground.
Note 2: I_STBY is specified with SDA = SCL = V_CC, outputs floating, and inputs connected to V_CC or GND.
Note 3: The DS4520 does not obstruct the SDA and SCL lines if V_CC is switched off as long as the voltages applied to these inputs
do not violate their minimum and maximum input voltage levels.
Note 4: Guaranteed by design.
Note 5: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I²C standard-mode timing.
Note 6: C_B—total capacitance of one bus line in picofarads.
Note 7: EEPROM write time applies to all the EEPROM memory and SRAM shadowed EEPROM memory when SEE = 0. The EEPROM
write time begins after a stop condition occurs.
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