MAX1206 Datasheet, PDF (6/29 Pages) Maxim Integrated Products – 40Msps, 12-Bit ADC

40Msps, 12-Bit ADC
ELECTRICAL CHARACTERISTICS (continued)
(V_DD = 3.3V, OV_DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C_REFOUT = 0.1µF, C_L ≈ 5pF at digital outputs, V_IN =
-0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, f_CLK = 40MHz (50% duty cycle), C_REFP = C_REFN = 0.1µF to GND, 1µF
in parallel with 10µF between REFP and REFN, C_COM = 0.1µF in parallel with 2.2µF to GND, T_A = -40°C to +85°C, unless otherwise
noted. Typical values are at T_A = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Digital Output Supply Current
I_OVDD
TIMING CHARACTERISTICS (Figure 5)
Clock Pulse-Width High
t_CH
Clock Pulse-Width Low
t_CL
Data Valid Delay
t_DAV
Data Setup Time Before Rising
Edge of DAV
t_SETUP
Normal operating mode,
f_IN = 20MHz at -0.5dBFS,
OV_DD = 2.0V, C_L ≈ 5pF
Power-down mode; clock idle,
PD = OV_DD
C_L = 5pF (Note 5)
C_L = 5pF (Notes 3, 5)
6.1
mA
6
µA
12.5
ns
12.5
ns
6.4
ns
13.9
ns
Data Hold Time After Rising Edge
of DAV
Wake-Up Time from Power-Down
t_HOLD
t_WAKE
C_L = 5pF (Notes 3, 5)
V_REFIN = 2.048V
10.7
ns
10
ms
Note 1: Specifications ≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: Specifications guaranteed by design and characterization. Devices tested for performance during production test.
Note 3: Guaranteed by design and characterization.
Note 4: During power-down, D11–D0, DOR, and DAV are high impedance.
Note 5: Digital outputs settle to V_IH or V_IL.
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