MAX1206 Datasheet, PDF (12/29 Pages) Maxim Integrated Products – 40Msps, 12-Bit ADC

40Msps, 12-Bit ADC
Typical Operating Characteristics (continued)
(V_DD = 3.3V, OV_DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C_REFOUT = 0.1µF, C_L ≈ 5pF at digital outputs, V_IN = -0.5dBFS
differential input, DCE = high, CLKTYP = high, PD = low, G/T = low, f_CLK = 40MHz (50% duty cycle), C_REFP = C_REFN = 0.1µF to GND, 1µF
in parallel with 10µF between REFP and REFN, C_COM = 0.1µF in parallel with 2.2µF to GND, T_A = +25°C, unless otherwise noted.)
SIGNAL-TO-NOISE RATIO
vs. CLOCK DUTY CYCLE
71
SINGLE-ENDED CLOCK
70 _{fIN = 19.9002858MHz}
69
68
67 _{DCE = HIGH}
66
65
64
DCE = LOW
63
62
61
20 30 40 50 60 70 80
CLOCK DUTY CYCLE (%)
SIGNAL-TO-NOISE + DISTORTION
vs. CLOCK DUTY CYCLE
71
SINGLE-ENDED CLOCK
70 _{fIN = 19.9002858MHz}
69
68
67 _{DCE = HIGH}
66
65
64
DCE = LOW
63
62
61
20 30 40 50 60 70 80
CLOCK DUTY CYCLE (%)
TOTAL HARMONIC DISTORTION
vs. CLOCK DUTY CYCLE
-65
-70
DCE = LOW
-75
-80
-85
-90
DCE = HIGH
-95 SINGLE-ENDED CLOCK
f_IN = 19.9002858MHz
-100
20 30 40 50 60 70 80
CLOCK DUTY CYCLE (%)
SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK DUTY CYCLE
100
SINGLE-ENDED CLOCK
95 ^{fIN = 19.9002858MHz}
90
85 _{DCE = HIGH}
80
75
DCE = LOW
70
65
20 30 40 50 60 70 80
CLOCK DUTY CYCLE (%)
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