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| MAX1206 Datasheet, PDF (4/29 Pages) Maxim Integrated Products – 40Msps, 12-Bit ADC | |||
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40Msps, 12-Bit ADC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL â 5pF at digital outputs, VIN =
-0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF
in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise
noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, VREFP, VREFN, and VCOM are applied externally)
COM Input Voltage
VCOM VDD / 2
1.65
V
REFP Input Voltage
VREFP - VCOM
0.512
V
REFN Input Voltage
VREFN - VCOM
-0.512
V
Differential Reference Input
Voltage
VREF
VREF = VREFP - VREFN
1.024
V
REFP Sink Current
REFN Source Current
COM Sink Current
REFP, REFN, Capacitance
COM Capacitance
IREFP
IREFN
ICOM
VREFP = 2.162V
VREFN = 1.138V
1.1
mA
1.1
mA
0.3
mA
13
pF
6
pF
CLOCK INPUTS (CLKP, CLKN)
Single-Ended Input High
Threshold
VIH
CLKTYP = GND, CLKN = GND
0.8 x
VDD
V
Single-Ended Input Low
Threshold
Differential Input Voltage Swing
Differential Input Common-Mode
Voltage
VIL
CLKTYP = GND, CLKN = GND
CLKTYP = high
CLKTYP = high
0.2 x
VDD
1.4
VDD / 2
V
VP-P
V
Minimum Clock Duty Cycle
Maximum Clock Duty Cycle
Input Resistance
RCLK
Input Capacitance
CCLK
DIGITAL INPUTS (CLKTYP, G/T, PD)
DCE = OVDD
DCE = GND
DCE = OVDD
DCE = GND
Figure 4
20
%
45
80
%
60
5
kâ¦
2
pF
Input High Threshold
VIH
0.8 x
OVDD
V
Input Low Threshold
Input Leakage Current
Input Capacitance
VIL
CDIN
VIH = OVDD
VIL = 0
0.2 x
V
OVDD
±5
µA
±5
5
pF
4 _______________________________________________________________________________________
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