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MAX16047A Datasheet, PDF (53/61 Pages) Maxim Integrated Products – 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
LOAD ADDRESS: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16047A/MAX16049A. When the
LOAD ADDRESS instruction latches into the instruction
register, TDI connects to TDO through the 8-bit memory
address test data register during the shift-DR state.
READ DATA: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16047A/MAX16049A. When the READ
instruction latches into the instruction register, TDI con-
nects to TDO through the 8-bit memory read test data
register during the shift-DR state.
WRITE DATA: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16047A/MAX16049A. When the
WRITE instruction latches into the instruction register,
TDI connects to TDO through the 8-bit memory write
test data register during the shift-DR state.
REBOOT: This is an extension to the standard IEEE
1149.1 instruction set to initiate a software controlled
reset to the MAX16047A/MAX16049A. When the
REBOOT instruction latches into the instruction register,
the MAX16047A/MAX16049A resets and immediately
begins the boot-up sequence.
SAVE: This is an extension to the standard IEEE 1149.1
instruction set that triggers a fault log. The current ADC
conversion results along with fault information are
saved to EEPROM depending on the configuration of
the Critical Fault Log Control register (r47h).
SETEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set that allows access to the extend-
ed page. Extended registers include ADC conversion
results and GPIO input/output data.
RSTEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEXTRAM to return to the
default page and disable access to the extended page.
SETEEPADD: This is an extension to the standard IEEE
1149.1 instruction set that allows access to the EEPROM
page. Once the SETEEPADD command has been sent, all
addresses are recognized as EEPROM addresses only.
RSTEEPADD: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEEPADD to return to the
default page and disable access to the EEPROM.
Applications Information
ture startup of a power supply before the EEPROM is
programmed, connect a resistor to ground or the supply
voltage. Avoid connecting a resistor to ground if the out-
put is to be configured as open-drain with a separate
pullup resistor.
Device Behavior at Power-Up
When VCC is ramped from 0V, the RESET output is high
impedance until VCC reaches 1.4V, at which point it is
driven low. All other outputs are high impedance until
VCC reaches 2.85V, when the EEPROM contents are
copied into register memory, and after which the out-
puts assume their programmed states.
Maintaining Power During a
Fault Condition
Power to the MAX16047A/MAX16049A must be main-
tained for a specific period of time to ensure a success-
ful EEPROM fault log operation during a fault that
removes power to the circuit. The amount of time
required depends on the settings in the fault control
register (r47h[1:0]) according to Table 30.
Table 30. EEPROM Fault Log Operation
Period
FAULT CONTROL
REGISTER VALUE
r47h[1:0]
DESCRIPTION
REQUIRED
PERIOD
tFAULT_SAVE (ms)
00
Failed lines and
306
ADC values saved
01
Failed lines saved
90
10
ADC values saved
252
11
No information
—
saved
Maintain power for shutdown during fault conditions in
applications where the always-on power supply cannot
be relied upon by placing a diode and a large capaci-
tor between the voltage source, VIN, and VCC (Figure
15). The capacitor value depends on VIN and the time
delay required, tFAULT_SAVE. Use the following formula
to calculate the capacitor size:
C = tFAULT_SAVE × ICC(MAX)
VIN − VDIODE − VCC(MIN)
Unprogrammed Device Behavior
When the EEPROM has not been programmed using the
JTAG or I2C interface, the default configuration of the
EN_OUT_ outputs is open-drain active-low. If it is neces-
sary to hold an EN_OUT_ high or low to prevent prema-
where the capacitance is in Farads and tFAULT_SAVE is
in seconds. ICC(MAX) is 5mA, VDIODE is the voltage
drop across the diode, and VUVLO is 2.85V. For exam-
ple, with a VIN of 14V, a diode drop of 0.7V, and a
tFAULT_SAVE of 0.306s, the minimum required capaci-
tance is 190µF.
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