MAX16047A Datasheet, PDF (52/61 Pages) Maxim Integrated Products – 12-Channel/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers

12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 27. JTAG Instruction Set
INSTRUCTION
BYPASS
IDCODE
USERCODE
LOAD ADDRESS
READ DATA
WRITE DATA
REBOOT
SAVE
SETEXTRAM
RSTEXTRAM
SETEEPADD
RSTEEPADD
HEX CODE
1Fh
00h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
SELECTED REGISTER/ACTION
Bypass. Mandatory instruction code.
Manufacturer ID code and part number
User code (user-defined ID)
Load address register content
Memory read
Memory write
Resets the device
Stores current fault information in EEPROM
Extended page access on
Extended page access off
EEPROM page access on
EEPROM page access off
BYPASS: When the BYPASS instruction is latched into
the instruction register, TDI connects to TDO through
the 1-bit bypass test data register. This allows data to
pass from TDI to TDO without affecting the device’s
normal operation.
IDCODE: When the IDCODE instruction is latched into
the parallel instruction register, the identification data
register is selected. The device identification code is
loaded into the identification data register on the rising
Table 28. 32-Bit Identification Code
edge of TCK following entry into the capture-DR state.
Shift-DR can be used to shift the identification code out
serially through TDO. During test-logic-reset, the
IDCODE instruction is forced into the instruction regis-
ter. The identification code always has a ‘1’ in the LSB
position. The next 11 bits identify the manufacturer’s
JEDEC number and number of continuation bytes fol-
lowed by 16 bits for the device and 4 bits for the ver-
sion. See Table 28.
MSB
Version (4 bits)
0000
Device ID (16 bits)
0000000000000001
Manufacturer ID (11 bits)
00011001011
Fixed value (1 bit)
1
LSB
USERCODE: When the USERCODE instruction latches
into the parallel instruction register, the user-code data
register is selected. The device user-code loads into
the user-code data register on the rising edge of TCK
following entry into the capture-DR state. Shift-DR can
be used to shift the user-code out serially through TDO.
See Table 29. This instruction may be used to help
identify multiple MAX16047A/MAX16049A devices con-
nected in a JTAG chain.
Table 29. 32-Bit User-Code Data
MSB
D.C. (don’t cares)
00000000000000000
I²C/SMBus
slave address
See Table 31
LSB
User identification (firmware version)
r5Ch[7:0] contents
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