MAX11312 Datasheet, PDF (5/54 Pages) Maxim Integrated Products – PIXI, 12-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO

MAX11312
PIXI, 12-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
REF Electrical Characteristics
(V_AVDD = 4.75V to 5.25V, V_DVDD = 3.3V, V_AVDDIO = +12.0V, V_AGND = V_DGND = 0V, V_AVSSIO = -2.0V, V_DACREF = 2.5V, V_ADCREF
= 2.5V (Internal), f_S = 400ksps, 10V analog input range set to range 1 (0 to +10V). T_A = -40°C to +105°C, unless otherwise noted.
Typical values are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
ADC INTERNAL REFERENCE
Reference Output Voltage
REF Output Tempco (Note 6)
Capacitor Bypass at ADC_INT_REF
T_C-VREF
Internal references at T_A = +25°C
DAC INTERNAL REFERENCE
Reference Output Voltage
REF Output Tempco (Note 6)
Capacitor Bypass at DAC_REF
Internal references at T_A = +25°C
T_C-VREF
DAC EXTERNAL REFERENCE
Reference Input Range
MIN TYP MAX UNITS
2.494 2.5 2.506
V
±10 ±25 ppm/°C
4.7
10
µF
2.494 2.5 2.506
V
±10 ±25 ppm/°C
4.7
10
µF
1.25
2.5
V
GPIO Electrical Specifications
(V_AVDD = 5.0V, V_DVDD = 3.3V, V_AVDDIO = +12.0V, V_AGND = V_DGND = 0V, V_AVSSIO = -2.0V, V_DACREF = 2.5V, V_ADCREF = 2.5V
(Internal), f_S = 400ksps, 10V analog input range set to range 1 (0 to +10V). T_A = -40°C to +105°C, unless otherwise noted. Typical
values are at T_A = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
GPIO EXCEPT IN BIDIRECTIONAL LEVEL TRANSLATION MODE
Programmable Input Logic Threshold
Input High Voltage
Input Low Voltage
V_ITH
V_IH
V_IL
Hysteresis
Programmable Output Logic Level ^V_OLVL
Propagation Delay from GPI Input
to GPO Output in Unidirectional
Level Translating Mode
Midscale threshold-5V logic swing
MIN
TYP MAX UNITS
0.3
V_{ITH + 0.3}
V_{DACREF V}
V
V_ITH - 0.3 V
±30
mV
0
4x
V_DACREF
V
2
µs
BIDIRECTIONAL LEVEL TRANSLATION PATH AND ANALOG SWITCH
Input High Voltage
V_IH
1
Input Low Voltage
V_IL
On-Resistance
From V_AVSSIO + 2.50V to V_AVDDIO -2.50V
Propagation Delay
10kΩ pullup resistors to rail in each side.
Midvoltage to midvoltage when driving
side goes from high to low
V
0.2
V
60
Ω
1
µs
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