DS5003 Datasheet, PDF (5/24 Pages) Maxim Integrated Products – Secure Microprocessor Chip

Secure Microprocessor Chip
AC CHARACTERISTICS—POWER-CYCLE TIME
(V_CC = 5V ±10%, T_A = 0°C to +70°C.) (Figure 4)
PARAMETER
Slew Rate from V_CCMIN to V_LI
Crystal Startup Time
Power-On Reset Delay
SYMBOL
MIN
t_F
130
t_CSU
t_POR
MAX
(Note 12)
21,504
UNITS
μs
t_CLK
AC CHARACTERISTICS—SERIAL PORT TIMING (MODE 0)
(V_CC = 5V ±10%, T_A = 0°C to +70°C.) (Figure 5)
PARAMETER
Serial Port Clock Cycle Time
Output Data Setup to Rising Clock Edge
Output Data Hold After Rising Clock Edge
Clock Rising Edge to Input Data Valid
Input Data Hold After Rising Clock Edge
SYMBOL
t_SPCLK
t_DOCH
t_CHDO
t_CHDV
t_CHDIV
MIN
12t_CLK
10t_CLK - 133
2t_CLK - 117
0
MAX
10t_CLK - 133
AC CHARACTERISTICS—BYTE-WIDE ADDRESS/DATA BUS TIMING
(V_CC = 5V ±10%, T_A = 0°C to +70°C.) (Figure 6)
PARAMETER
Delay to Byte-Wide Address Valid from CE1, CE2,
or CE1N Low During Op Code Fetch
Pulse Width of CE1–CE4, PE1–PE4, or CE1N
Byte-Wide Address Hold After CE1, CE2, or CE1N
High During Op Code Fetch
Byte-Wide Data Setup to CE1, CE2, or CE1N High
During Op Code Fetch
Byte-Wide Data Hold After CE1, CE2, or CE1N High
During Op Code Fetch
Byte-Wide Address Hold After CE1–CE4, PE1–PE4,
or CE1N High During MOVX
Delay from Byte-Wide Address Valid CE1–CE4,
PE1–PE4, or CE1N Low During MOVX
SYMBOL
t_CE1LPA
t_CEPW
t_CE1HPA
t_OVCE1H
t_CE1HOV
t_CEHDA
t_CELDA
MIN
4t_CLK - 35
2t_CLK - 20
1t_CLK + 40
0
4t_CLK - 30
4t_CLK - 35
MAX
30
Byte-Wide Data Setup to CE1–CE4, PE1–PE4, or
CE1N High During MOVX (Read)
t_DACEH
1t_CLK + 40
Byte-Wide Data Hold After CE1–CE4, PE1–PE4, or
CE1N High During MOVX (Read)
Byte-Wide Address Valid to R/W Active During
MOVX (Write)
t_CEHDV
t_AVRWL
0
3t_CLK - 35
UNITS
μs
ns
ns
ns
ns
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
_______________________________________________________________________________________ 5