DS5003 Datasheet, PDF (21/24 Pages) Maxim Integrated Products – Secure Microprocessor Chip

Secure Microprocessor Chip
reached by the expanded bus on ports 0 and 2. An
alternate configuration allows dynamic partitioning of a
64kB space as shown in Figure 11. Selecting PES = 1
provides another 64kB of potential data storage or
memory-mapped peripheral space as shown in Figure
12. These selections are made using special function
registers. The memory map and its controls are cov-
ered in detail in the Secure Microcontroller User’s
Guide.
Figure 13 illustrates a typical memory connection for a
system using a 128kB SRAM. Note that in this configu-
ration, both program and data are stored in a common
SRAM chip. Figure 14 shows a similar system with
using two 32kB SRAMs. The byte-wide address bus
connects to the SRAM address lines. The bidirectional
byte-wide data bus connects the data I/O lines of the
SRAM.
FFFFh
PROGRAM MEMORY
DATA MEMORY (MOVX)
NV RAM
DATA
PARTITION
0000h
NV RAM
PROGRAM
LEGEND:
= NV RAM MEMORY
= EXPANDED BUS (PORTS 0 AND 2)
Figure 11. Memory Map in Partitionable Mode (PM = 0)
= NOT AVAILABLE
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