DS5003 Datasheet, PDF (14/24 Pages) Maxim Integrated Products – Secure Microprocessor Chip

Secure Microprocessor Chip
PIN
62
78
3
22
23
14
47, 48
34
32
42
43
53
68, 73
NAME
CE4
PE1
PE2
PE3
PE4
MSEL
XTAL2,
XTAL1
RST
PROG
VRST
PF
SDI
N.C.
Pin Description (continued)
FUNCTION
Active-Low Chip-Enable 4. This chip enable is provided to access a fourth 32kB block of
memory. It connects to the chip-enable input of one SRAM. When MSEL = 0, this signal is
unused. CE4 is lithium-backed and remains at a logic-high when V_CC falls below V_LI.
Active-Low Peripheral Enable 1. Accesses data memory between addresses 0000h and 3FFFh
when the PES bit is set to logic 1. Commonly used to chip enable a byte-wide real-time clock
such as the DS1283. PE1 is lithium backed and remains at a logic-high when V_CC falls below
V_LI. Connect PE1 to battery-backed circuitry only.
Active-Low Peripheral Enable 2. Accesses data memory between addresses 4000h and 7FFFh
when the PES bit is set to logic 1. PE2 is lithium backed and remains at a logic-high when V_CC
falls below V_LI. Connect PE2 to battery-backed circuitry only.
Active-Low Peripheral Enable 3. Accesses data memory between addresses 8000h and BFFFh
when the PES bit is set to a logic 1. PE3 is not lithium backed and can be connected to any type
of peripheral function. If connected to a battery-backed chip, it needs additional circuitry to
maintain the chip enable in an inactive state when V_CC < V_LI.
Active-Low Peripheral Enable 4. Accesses data memory between addresses C000h and FFFFh
when the PES bit is set to logic 1. PE4 is not lithium backed and can be connected to any type
of peripheral function. If connected to a battery-backed chip, it needs additional circuitry to
maintain the chip enable in an inactive state when V_CC < V_LI.
Memory Select. This signal controls the memory size selection. When MSEL = +5V, the
DS5003 expects to use 32kB x 8 SRAMs. When MSEL = 0V, the DS5003 expects to use a
128kB x 8 SRAM. MSEL must be connected regardless of partition, mode, etc.
CLOCK PINS
Crystal Connections. Used to connect an external crystal to the internal oscillator. XTAL1 is the
input to an inverting amplifier and XTAL2 is the output.
RESET, STATUS, AND SELF-DESTRUCT PINS
Active-High Reset Input. A logic 1 applied to this pin activates a reset state. This pin is pulled
down internally so this pin can be left unconnected if not used. An RC power-on reset circuit is
not needed and is not recommended.
Invokes the Bootstrap Loader on Falling Edge. This signal should be debounced so that only
one edge is detected. If connected to ground, the microcontroller enters bootstrap loading on
power-up. This signal is pulled up internally.
Reset State Active Due to Low V_CC. This I/O pin (open drain with internal pullup) indicates that
the power supply (V_CC) has fallen below the V_CCMIN level and the microcontroller is in a reset
state. When this occurs, the DS5003 drives this pin to logic 0. Because the microcontroller is
lithium backed, this signal is guaranteed even when V_CC = 0V. Because it is an I/O pin, it also
forces a reset if pulled low externally. This allows multiple parts to synchronize their power-
down resets.
Lithium Backup Active. This output goes to a logic 0 to indicate that the microcontroller has
switched to lithium backup. This corresponds to V_CC < V_LI. Because the microcontroller is
lithium backed, this signal is guaranteed even when V_CC = 0V. The normal application of this
signal is to control lithium-powered current to isolate battery-backed functions from nonbattery-
backed functions.
Self-Destruct Input. An active high on this pin causes an unlock procedure. This results in the
destruction of vector SRAM, encryption keys, and the loss of power from V_CCO. This pin should
be grounded if not used.
MISCELLANEOUS PINS
No Connection
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