71M6521DE Datasheet, PDF (40/107 Pages) Teridian Semiconductor Corporation – Energy Meter IC

71M6521DE/DH/FE Data Sheet
Optical Interface
The device includes an interface to implement an IR/optical port. The pin OPT_Tx is designed to directly drive an
external LED for transmitting data on an optical link. The pin OPT_RX is designed to sense the input from an external
photo detector used as the receiver for the optical link. These two pins are connected to a dedicated UART port
(UART1).
The OPT_TX and OPT_RX pins can be inverted with configuration bits OPT_TXINV and OPT_RXINV, respectively.
Additionally, the OPT_TX output may be modulated at 38kHz. Modulation is available when system power is present
(i.e. not in BROWNOUT mode). The OPT_TXMOD bit enables modulation. Duty cycle is controlled by OPT_FDC[1:0],
which can select 50%, 25%, 12.5%, and 6.25% duty cycle. 6.25% duty cycle means OPT_TX is low for 6.25% of the
period. Figure 7 illustrates the OPT_TX generator.
from OPT_TX UART
OPT_TXINV
A
OPT_TXMOD
OPT_FDC
VARPULSE
WPULSE
MOD
DIO2
B
EN DUTY
2
3
Internal
2
1
0
OPT_TXE[1:0]
OPT_TX
V3P3
OPT_TXMOD=0
A
B
OPT_TXMOD=1,
OPT_FDC=2 (25%)
A
B
1/38kHz
Figure 7: Optical Interface
When not needed for the optical UART, the OPT_TX pin can alternatively be configured as DIO2, WPULSE, or
VARPULSE. The configuration bits are OPT_TXE[1:0]. Likewise, OPT_RX can alternately be configured as DIO_1. Its
control is OPT_RXDIS.
Digital I/O
The device includes up to 18 pins (QFN 68 package) or 14 pins (LQFP 64 package) of general purpose digital I/O.
These pins are compatible with 5 V inputs (no current-limiting resistors are needed). Some of them are dedicated DIO
(DIO3), some are dual-function that can alternatively be used as LCD drivers (DIO4-11, 14-17, 19-21) and some
share functions with the optical port (DIO1, DIO2). On reset or power-up, all DIO pins are inputs until they are
configured for the desired direction under MPU control. The pins are configured by the DIO registers and by the five
bits of the LCD_NUM register (located in I/O RAM). Once declared as DIO, each pin can be configured independently
as an input or output with the DIO_DIRn bits. A 3-bit configuration word, DIO_Rx, can be used for certain pins, when
configured as DIO, to individually assign an internal resource such as an interrupt or a timer control. Table 54 lists the
direction registers and configurability associated with each group of DIO pins. Table 55 shows the configuration for a
DIO pin through its associated bit in its DIO_DIR register.
Tables showing the relationship between LCD_NUM and the available segment/DIO pins can be found in the
Applications section and in the I/O RAM Description under LCD_NUM[4:0].
Page: 40 of 107
Rev 2