MAX8893A Datasheet, PDF (39/50 Pages) Maxim Integrated Products – μPMICs for Multimedia Application Processors in a 3.0mm x 2.5mm WLP

µPMICs for Multimedia Application Processors
in a 3.0mm x 2.5mm WLP
Table 9. DVS Ramp Control
This register contains DVS enable/disable and ramp rate control for the step-down converter.
Register Pointer
Reset Value
Type
Special Features
REGISTER NAME
DVS RAMP CONTROL
0x03
0x09
Read/write
—
BIT
B7 (MSB)
B6
B5
B4
B3
B2
B1
B0 (LSB)
NAME
—
—
—
ENDVS
BUCKRAMP
DESCRIPTION
Reserved for future use
Reserved for future use
Reserved for future use
0 = BUCK DVS is disabled
1 = BUCK DVS is enabled
Step-down output voltage ramp rate control
0000 (0x0) = 1mV/Fs
0001 (0x1) = 2mV/Fs
0010 (0x2) = 3mV/Fs
0011 (0x3) = 4mV/Fs
0100 (0x4) = 5mV/Fs
0101 (0x5) = 6mV/Fs
0110 (0x6) = 7mV/Fs
0111 (0x7) = 8mV/Fs
1000 (0x8) = 9mV/Fs
1001 (0x9) = 10mV/Fs
1010 (0xA) = 11mV/Fs
1011 (0xB) = 12mV/Fs
DEFAULT VALUE
—
—
—
0
1001
(0x9)
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