MAX8893A Datasheet, PDF (30/50 Pages) Maxim Integrated Products – μPMICs for Multimedia Application Processors in a 3.0mm x 2.5mm WLP

µPMICs for Multimedia Application Processors
in a 3.0mm x 2.5mm WLP
Table 4. Truth Table for USB Switch
ENUSB
0
0
1
1
EUSB BIT
0
1
0
1
USB SWITCH
On
On
On
Off
Power-Up Sequencing
Drive ENBUCK or ENLDO_ high to turn on the BUCK
converter or the corresponding LDOs. When ENBUCK
and ENLDO_ are connected together and driven from
low to high, all the regulators are turned on with the
preset power-up sequencing. There are time delays
between each regulator to limit input current rush.
The MAX8893A/MAX8893B/MAX8893C have different
power-up time delays between each regulator. See the
Typical Operating Characteristics for details.
Undervoltage Lockout
When VIN rises above the undervoltage lockout thresh-
old (2.85V typ), the MAX8893A/MAX8893B/MAX8893C
can be enabled by driving any EN_ high or ENUSB
low. The UVLO threshold hysteresis is typically 0.5V.
Therefore, if VIN falls below 2.35V (typ), the undervolt-
age lockout circuitry disables all outputs and all internal
registers are reset to default values.
Reference Noise Bypass (REFBP)
Bypass REFBP to AGND with a 0.1FF ceramic capaci-
tor to reduce noise on the LDO outputs. REFBP is high
impedance in shutdown.
Thermal-Overload Protection
Thermal-overload protection limits total power dissi-
pation in the MAX8893A/MAX8893B/MAX8893C. The
step-down converter and LDOs have independent ther-
mal protection circuits. When the junction temperature
exceeds +160NC, the LDO, or step-down thermal-
overload protection circuitry disables the corresponding
regulators, allowing the IC to cool. The LDO thermal-
overload protection circuit enables the LDOs after the
LDO junction temperature cools down, resulting in
pulsed LDO outputs during continuous thermal-overload
conditions. The step-down converter’s thermal-overload
protection circuitry enables the step-down converter
after the junction temperature cools down. Thermal-
overload protection safeguards the IC in the event of
fault conditions.
USB High-Speed Switch
The USB high-speed switch is a Q15kV ESD-protected
DPDT analog switch. It is ideal for USB 2.0 Hi-Speed
(480Mbps) switching applications and also meets USB
low- and full-speed requirements.
The USB switch is fully specified to operate from a single
2.7V to 5.5V supply. The switch is based on charge-pump-
assisted n-channel architecture. The switch also features a
shutdown mode to reduce the quiescent current.
Digital Control Input
The USB high-speed switch provides a single-bit control
logic input, CB. CB controls the position of the switches
as shown in Figure 7. Driving CB rail-to-rail minimizes
power consumption.
BATT
ENUSB
MAX8893A
CB
MAX8893B
MAX8893C
NC1
COM1
NO1
NC2
COM2
NO2
ENUSB CB
0
0
0
1
1
X
N0_ NC_ COM_
OFF ON —
ON OFF —
OFF OFF HI-Z
X = DON'T CARE.
Figure 7. USB Switch Functional Diagram/Truth Table
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