MAX13171E Datasheet, PDF (38/38 Pages) Maxim Integrated Products – Multiprotocol, Pin-Selectable Data Interface Chipset

Multiprotocol, Pin-Selectable
Data Interface Chipset
Pin Configurations (continued)
TOP VIEW
31 30 29 28 27 26 25 24 23 22 21 20
DCE/DTE 32
19 V_CC
LATCH 33
18 GND
M2 34
M1 35
MAX13175E
17 V_DD
16 V_EE
M0 36
15 V_L
R1C 37
*EP
14 R3C
R1B 38 +
13 GND
1 2 3 4 5 6 7 8 9 10 11 12
TQFN
*CONNECT EXPOSED PAD TO V_EE
PROCESS: BiCMOS
Chip Information
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
38 TQFN-EP
T3857-1
21-0172
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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