MAX13171E Datasheet, PDF (16/38 Pages) Maxim Integrated Products – Multiprotocol, Pin-Selectable Data Interface Chipset

Multiprotocol, Pin-Selectable
Data Interface Chipset
MAX13171E Pin Description
PIN
1, 2, 6, 30, 31
3, 16
4
5
7
8
9
10
11
12
13
14
15
17
18
19, 24, 29, 35
20
21
22
23
25
26
27
28
32
33
34
36
37
38
—
NAME
FUNCTION
N.C.
No Connection. Not internally connected.
V_CC
Device Supply Voltage. Bypass V_CC with a 4.7µF capacitor to ground as close as possible to
pin 3.
T1IN
Transmitter 1 Logic Input
T2IN
T3IN
Transmitter 2 Logic Input
Transmitter 3 Logic Input
R1OUT
R2OUT
R3OUT
M0
Receiver 1 Logic Output with Internal Pullup to V_L
Receiver 2 Logic Output with Internal Pullup to V_L
Receiver 3 Logic Output with Internal Pullup to V_L
Mode-Select 0 Input with Internal Pullup to V_L
V_L
Logic-Supply Reference Input. V_L determines the voltage level of the logic interface. Bypass V_L
with a 0.1µF capacitor to ground as close as possible to the device.
M1
M2
DCE/DTE
R3INB
Mode-Select 1 Input with Internal Pullup to V_L
Mode-Select 2 Input with Internal Pullup to V_L
DCE/DTE Mode-Select Input with Internal Pullup to V_L
Receiver 3 Noninverting Input
R3INA
Receiver 3 Inverting Input
GND
Ground
R2INB
R2INA
Receiver 2 Noninverting Input
Receiver 2 Inverting Input
T3OUTB/R1INB Transmitter 3 Noninverting Output/Receiver 1 Noninverting Input
T3OUTA/R1INA Transmitter 3 Inverting Output/Receiver 1 Inverting Input
T2OUTB Transmitter 2 Noninverting Output
T2OUTA Transmitter 2 Inverting Output
T1OUTB Transmitter 1 Noninverting Output
T1OUTA Transmitter 1 Inverting Output
V_EE
Charge-Pump Negative Supply Output. Connect a 4.7µF ceramic capacitor from V_EE to ground
as close as possible to the device.
C2-
V_EE Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor
between C2+ and C2-.
C2+
V_EE Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor
between C2+ and C2-.
C1-
V_DD Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor
between C1+ and C1-.
C1+
V_DD Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor
between C1+ and C1-.
V_DD
Charge-Pump Positive-Supply Output. Connect a 4.7µF ceramic capacitor from V_DD to ground
as close as possible to the device.
Exposed Pad. Internally connected to V_EE. Connect to a large V_EE plane to maximize thermal
EP
performance. Not intended as an electrical connection point. Do not share the same plane as
the MAX13173E.
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