MAX16070 Datasheet, PDF (37/52 Pages) Maxim Integrated Products – 12-Channel/8-Channel, Flash-Configurable System Monitors with Nonvolatile Fault Registers

12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
Table 22. SMBus Alert Configuration
REGISTER
ADDRESS
FLASH
ADDRESS
BIT RANGE
DESCRIPTION
SMBus Alert Configuration
00 = Disabled
35h
235h
[1:0]
01 = Fault1 is SMBus ALERT
10 = Fault2 is SMBus ALERT
11 = ANY_FAULT is SMBus ALERT
4) The master sends 8 bits of the block read com-
mand code.
5) The slave asserts an ACK on the data line unless busy.
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave ID plus a read
bit (high).
8) The slave asserts an ACK on the data line.
9) The slave sends an 8-bit byte count (16).
10) The master asserts an ACK on the data line.
11) The slave sends 8 bits of data.
12) The master asserts an ACK on the data line.
13) Repeat steps 11 and 12 up to 15 times.
14) The slave sends an 8-bit PEC byte.
15) The master asserts a NACK on the data line.
16) The master generates a STOP condition.
SMBALERT
The MAX16070/MAX16071 support the SMBus alert
protocol. To enable the SMBus alert output, set r35h[1:0]
according to Table 22, which configures a Fault1, Fault2,
or ANY_FAULT output to act as the SMBus alert. This
output is open-drain and uses the wired-OR configura-
tion with other devices on the SMBus. During a fault,
the MAX16070/MAX16071 assert ALERT low, signaling
the master that an interrupt has occurred. The master
responds by sending the ARA (Alert Response Address)
protocol on the SMBus. This protocol is a read byte with
09h as the slave address. The slave acknowledges the
ARA (09h) address and sends its own SMBus address to
the master. The slave then deasserts ALERT. The master
can then query the slave and determine the cause of the
fault. By checking r1Ch[6], the master can confirm that
the MAX16070/MAX16071 triggered the SMBus alert.
The master must send the ARA before clearing r1Ch[6].
Clear r1Ch[6] by writing a ‘1’.
JTAG Serial Interface
The MAX16070/MAX16071 feature a JTAG port that
complies with a subset of the IEEE^® 1149.1 specifica-
tion. Either the SMBus or the JTAG interface can be used
to access internal memory; however, only one interface
is allowed to run at a time. The MAX16070/MAX16071
do not support IEEE 1149.1 boundary-scan functionality.
The MAX16070/MAX16071 contain extra JTAG instruc-
tions and registers not included in the JTAG specifica-
tion that provide access to internal memory. The extra
instructions include LOAD ADDRESS, WRITE DATA,
READ DATA, REBOOT, SAVE.
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