MAX14827 Datasheet, PDF (37/41 Pages) Maxim Integrated Products – Integrated LED Driver

MAX14827
IO-Link Device Transceiver
SPI Burst Access
Burst access allows writing or reading in one block,
by only defining the initial register address in the SPI
command byte. Once the initial SPI address is received,
the MAX14827 automatically increments the register after
each SPI data byte. Efficient programming of multiple
consecutive registers is thus possible. Chip select, CS/
PP, must be kept low during the whole write/read cycle.
The SPI clock continues clocking throughout the burst
access cycle. The burst cycle ends when the SPI master
pulls CS/PP high.
Applications Information
Microcontroller Interfacing
The logic levels of the microcontroller interface I/Os are
defined by V_L. Apply a voltage from 2.5V to 5.5V to VL for
normal operation. Logic outputs are supplied by VL.
The device can be configured for simultaneous or
multiplexed UART communication. When configured for a
multipexed UART interface, the SPI interface and UART
interface pins are shared. See the Mode Selection Table
for more information.
Transient Protection
Inductive load switching, ESD, bursts, and surges create
high transient voltages. V24, C/Q, DI, and DO should
be protected against high overvoltage and undervoltage
transients. Positive voltage transients on V24, C/Q, DO,
and DI must be limited to +70V relative to GND. Negative
voltage transients must be limited to -70V relative to V24.
Use protection diodes on C/Q, DO, and DI as shown in
Figure 9.
For standard ESD and burst protection demanded by the
IO-Link specification, small package TVS can be used (like
the uClamp3603T or the SPT01-335). If higher level surge
ratings need to be achieved (IEC 61000-4-5 ±1kV/ 42Ω),
SMAJ33A or SMBJ36A TVS protectors can also be used.
Using an External Transistor with the 5V
Regulator
The internal 5V regulator (V5) can provide up to 30mA
of total load current (including the current on to the V33
LDO) when V5 is connected to REG. To achieve larger
V24
MAX14827 ^DO
C/Q
DI
GND
Figure 9. MAX14827 Operating Circuit with TVS Protection
load currents or to shunt the power dissipation away
from the MAX14827, an external NPN transistor can be
connected as shown in Figure 10.
Select an NPN transistor with high VCE voltage to support
the max L+ supply voltage. In order to protect the NPN
transistor against reverse polarity of the L+ / L- supply
terminals, connect a silicon or a Schottky diode in series
with the NPN transistor’s collector that has a reverse
voltage capability large enough for reverse connected
L+/L-. A 1µF capacitor on the V5 is required for stability.
Using an Step-Down Regulator with the 5V
Regulator
To decrease power dissipation in the MAX14827, V5 can
be powered by an external step-down regulator. Connect
the external regulator’s output to the V5 input and leave
REG unconnected. (Figure 11)
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