MAX14720 Datasheet, PDF (29/38 Pages) Maxim Integrated Products – Extended System Battery Use Time

MAX14720/MAX14750
Power-Management Solution
Burst Write
In this operation, the master sends an address and multiple
data bytes to the slave device (Figure 6). The slave
device automatically increments the register address after
each data byte is sent, unless the register being accessed
is 0x00, in which case the register address remains the
same. The following procedure describes the burst write
operation:
1) The master sends a START condition
2) The master sends the 7-bit slave address plus a
write bit (low)
3) The addressed slave asserts an ACK on the data
line
4) The master sends the 8-bit register address
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not)
6) The master sends eight data bits
7) The slave asserts an ACK on the data line
8) Repeat 6 and 7 N-1 times
9) The master generates a STOP condition
Single Byte Read
In this operation, the master sends an address plus two
data bytes and receives one data byte from the slave
device (I2C Register Descriptions). The following proce-
dure describes the single byte read operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
6) The master sends a REPEATED START condition.
7) The master sends the 7-bit slave address plus a read
bit (high).
8) The addressed slave asserts an ACK on the data line.
9) The slave sends eight data bits.
10) The master asserts a NACK on the data line.
11) The master generates a STOP condition.
Figure 6
BURST WRITE
S
DEVICE SLAVE ADDRESS - W A
REGISTER ADDRESS
A
8 DATA BITS - 1
A
8 DATA BITS - 2
A
8 DATA BITS - N
A
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 6. Burst Write Sequence
Figure 7
READ SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W A
REGISTER ADDRESS
A
Sr
DEVICE SLAVE ADDRESS - R A
8 DATA BITS
NA
P
FROM MASTER TO SLAVE
Figure 7. Read Byte Sequence
FROM SLAVE TO MASTER
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