MAX1513 Datasheet, PDF (27/28 Pages) Maxim Integrated Products – TFT-LCD Power-Supply Controllers

TFT-LCD Power-Supply Controllers
PC Board Layout and Grounding
Careful PC board layout is important for proper operation.
Use the following guidelines for good PC board layout:
1) Minimize the area of high-current loops. The high-
current input loop goes from the positive terminals of
the input capacitors to the inductor, to the power
MOSFET, and to the negative terminals of the input
capacitors. The high-current output loop is from the
positive terminals of the input capacitors to the
inductor, to the output diode, and to the positive ter-
minals of the output capacitors, reconnecting
between the output-capacitor and input-capacitor
ground terminals. Connect these loops with short,
wide connections. Avoid using vias in the high-cur-
rent paths. If vias are unavoidable, use many vias in
parallel to reduce resistance and inductance.
2) Create a power ground plane consisting of the input
and output-capacitor ground terminals, the source of
the power MOSFET, and any ground terminals of the
charge-pump components. Connect all of these
together with short, wide traces or a small ground
plane. Maximizing the width of the power ground
traces improves efficiency and reduces output volt-
age ripple and noise spikes. Create an analog
ground plane consisting of the IC’s backside pad, all
the feedback-divider ground connections, the buffer-
amplifier-divider ground connection, the REF capaci-
tor ground connection, and the DEL capacitor ground
connection. The power ground plane and the analog
ground plane should be connected at only one loca-
tion, which is the IC’s GND pin. All other ground con-
nections, such as the IN pin bypass capacitor and
the linear-regulator output capacitors, should be star-
connected directly to the backside pad of the IC
through a via with wide traces, not otherwise connect-
ing to either the power ground plane or the analog
ground plane. Connect the IC’s backside pad to the
IC’s GND pin. Make no other connections between
the analog and power ground planes.
3) Place IN and REF bypass capacitors as close to the
device as possible.
4) Place all feedback-voltage-divider resistors as close
to their respective feedback pins as possible. The
divider’s center trace should be kept short. Placing
the resistors far away causes their FB traces to
become antennas that can pick up switching noise.
Care should be taken to avoid running any feedback
trace near the switching nodes in the step-up regu-
lator and charge pumps.
5) Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient responses.
6) Minimize the size of the switching node while keeping
it wide and short. Keep the switching node away from
feedback nodes (FB, FBP, FBL, FBG, and FBN) and
analog ground. Use DC traces to shield if necessary.
Refer to the MAX1513 evaluation kit for an example of
proper board layout.
Pin Configuration
TOP VIEW
20 19 18 17 16
REF 1
SDFR 2
*FBPB 3
*OUTB 4
*SUPB 5
MAX1513
MAX1514
15 GND
14 DRVP
13 FBP
12 *FBG
11 *DRVG
6 7 8 9 10
Chip Information
TRANSISTOR COUNT: 4807
PROCESS: BiCMOS
THIN QFN
4mm x 4mm
*N.C. FOR MAX1514
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