MAX1513 Datasheet, PDF (16/28 Pages) Maxim Integrated Products – TFT-LCD Power-Supply Controllers

TFT-LCD Power-Supply Controllers
Gamma Linear-Regulator Controller
(MAX1513 Only)
The gamma linear-regulator controller REG G is an ana-
log gain block with an open-drain N-channel output. It
drives an external PNP pass transistor with a 1.5kΩ
base-to-emitter resistor (Figure 1). Its guaranteed base-
drive sink current is at least 5mA. The regulator, includ-
ing Q4 in Figure 1, uses a 0.47µF ceramic output
capacitor, and the controller is designed to deliver
40mA at 14.7V. Other output voltages and currents are
possible by scaling the pass transistor, input capacitor,
and output capacitor. See the Pass-Transistor Selection
and Stability Requirements sections.
REG G is typically used to provide the TFT-LCD gamma
reference voltage, which is usually 0.3V below the
source-drive supply voltage.
REG G is enabled 2.7ms after REG P’s soft-start has
completed. Each time it is enabled, the controller goes
through a soft-start routine that ramps up its internal ref-
erence DAC in 128 steps.
Buffer Amplifier (MAX1513 Only)
The MAX1513 includes a buffer amplifier that is typical-
ly used to drive the LCD backplane (VCOM) or the
gamma-correction divider string. The buffer amplifier
features ±150mA output short-circuit current, 10V/µs
slew rate, and 12MHz bandwidth. The Rail-to-Rail^®
input and output capability maximizes its flexibility.
Short-Circuit Current Limit
The MAX1513’s buffer amplifier limits short-circuit cur-
rent to approximately ±150mA if the output is directly
shorted to SUPB or to GND. If the short-circuit condition
persists, the junction temperature of the IC rises until it
reaches the thermal-shutdown threshold (+160°C typ).
Once the junction temperature reaches the thermal-
shutdown threshold, an internal thermal sensor immedi-
ately sets the thermal fault latch, shutting off all the IC’s
outputs. The device remains inactive until the input volt-
age is cycled below V_UVLO.
Driving Pure Capacitive Load
The buffer amplifier is typically used to drive the LCD
backplane (VCOM) or the gamma-correction divider
string. The LCD backplane consists of a distributed
series capacitance and resistance, a load that can be
easily driven by the buffer amplifier. When driving a
pure capacitive load, the amplifier’s gain peaking
increases. A 5Ω to 50Ω resistor placed between OUTB
and the capacitive load reduces peaking.
Undervoltage Lockout
The undervoltage-lockout (UVLO) circuit compares the
voltage at the IN pin with the UVLO threshold (2.7V ris-
ing, 2.35V falling, typ) to ensure the input voltage is
high enough for reliable operation. The 350mV (typ)
hysteresis prevents supply transients from causing a
restart. Once the input voltage exceeds the UVLO ris-
ing threshold, the IC is allowed to start. When the input
voltage falls below the UVLO falling threshold, all the
regulator outputs (including REF) are disabled until the
input voltage exceeds the UVLO rising threshold.
Reference Voltage (REF)
The reference output is nominally 1.25V and can source
at least 100µA without degrading its accuracy (see the
Typical Operating Characteristics). Bypass REF with a
0.22µF ceramic capacitor connected between REF and
the analog ground plane (which connects to GND).
Shutdown and Oscillator-
Frequency Selection
The four-level logic input SDFR controls shutdown and
oscillator-frequency selection. Connecting SDFR to
ground shuts off all the regulator outputs except the logic
linear-regulator controller (REG L), buffer amplifier, and
REF. Connecting SDFR to IN sets the oscillator frequen-
cy to 1.5MHz. Connecting SDFR to REF sets the oscilla-
tor frequency to 750kHz. Leaving SDFR unconnected
sets the oscillator frequency to 430kHz. When SDFR is
left unconnected, bypass the pin to ground with a
1000pF to 0.1µF capacitor to prevent switching noise
from coupling into the pin’s high input impedance. Note
the soft-start period and the fault-timer period do not
change with the oscillator frequency.
Power-Up Sequence
and Delay Control Block
Once the voltage on IN exceeds the UVLO rising thresh-
old (2.7V typ), the internal reference is enabled. With a
0.22µF REF bypass capacitor, the reference reaches its
regulation voltage of 1.25V in approximately 1ms. When
the reference voltage is ready, the MAX1513/MAX1514
enable the logic linear regulator. The MAX1513 also
enables the buffer amplifier at the same time. Once the
logic linear-regulator soft-start is completed, the
MAX1513/MAX1514 enable the step-up regulator and
REG N simultaneously. Once the soft-start of the step-up
regulator is completed, the MAX1513/MAX1514 enable
the delay control block. An internal 5µA current starts
charging the timing capacitor on DEL. When the voltage
on DEL reaches 1.25V, the MAX1513/MAX1514 enable
REG P. With a 0.1µF capacitor on DEL, the DEL voltage
reaches 1.25V in about 25ms. The MAX1513 enables the
gamma linear regulator 2.7ms after the soft-start of REG P
is completed.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
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