MAX1513 Datasheet, PDF (26/28 Pages) Maxim Integrated Products – TFT-LCD Power-Supply Controllers

TFT-LCD Power-Supply Controllers
A_{V _LR}
≈
⎛ 4⎞
⎝⎜ V_T ⎠⎟
×
⎡
⎢1
⎣⎢
+
⎛
⎝⎜
I_BIAS × h_FE
I_{LOAD _ LR}
⎞
⎠⎟
⎤
⎥
⎦⎥
×
V_REF
where V_T is 26mV at room temperature and I_BIAS is the
current through the base-to-emitter resistor (R_BE). Each
of the four linear-regulator controllers is designed for a
different maximum output current, so they have differ-
ent output drive currents and different bias currents
(I_BIAS). Each controller’s bias current can be found in
the Electrical Characteristics table. The current listed in
the conditions column for the FB_ regulation voltage
specification is the individual controller’s bias current.
The base-to-emitter resistor for each controller should
be chosen to set the correct I_BIAS:
R_BE =
V_BE
I_BIAS
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, the pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system. The output capacitor’s
ESR generates a zero. For proper operation, use the
following equations to verify the linear regulator is prop-
erly compensated:
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
f_{POLE_LR} =
I_{LOAD(MAX) _ LR}
2π × C_{OUT _LR} × V_{OUT _LR}
The unity-gain crossover of the linear regulator is:
f_CROSSOVER = A_{V _LR} × f_{POLE_LR}
2) The pole created by the internal amplifier delay is
about 1MHz:
f_{POLE_ AMP} ≈ 1MHz
3) Next, calculate the pole set by the transistor’s input
capacitance C_IN, the transistor’s input resistance
R_IN, and the base-to-emitter pullup resistor:
( ) ^{fPOLE_IN =}
1
2π × C_IN × R_BE ||R_IN
where C_IN =
g_m
2πf_T
,
R_IN
=
h_{FE ,}
g_m
g_m is the transconductance of the pass transistor,
and f_T is the transition frequency. Both parameters
can be found in the transistor’s data sheet. Because
R_BE is much greater than R_IN, the above equation
can be simplified:
f_{POLE_IN} =
1
2π × C_IN × R_IN
The equation can be further simplified:
f_{POLE_IN} =
f_T
h_FE
4) Next, calculate the pole set by the linear regulator’s
feedback resistance and the capacitance between
FB_ and GND (including stray capacitance):
( ) ^{fPOLE_FB =}
1
2π × C_FB × R_UPPER ||R_LOWER
where C_FB is the capacitance between FB_ and
ground, R_UPPER is the upper resistor of the linear
regulator’s feedback divider, and R_LOWER is the
lower resistor of the divider.
5) Next, calculate the zero caused by the output
capacitor’s ESR:
f_{POLE_ESR} =
1
2π × C_{OUT _LR} × R_ESR
where R_ESR is the equivalent series resistance
of C_{OUT_LR}.
6) To ensure stability, choose C_{OUT_LR} large enough
so the crossover occurs well before the poles and
zero calculated in steps 2 to 5. The poles in steps 3
and 4 generally occur at several megahertz and
using ceramic capacitors ensures the ESR zero
occurs at several megahertz as well. Placing the
crossover below 500kHz is sufficient to avoid the
amplifier-delay pole and generally works well,
unless unusual component choices or extra capac-
itances move the other poles or zero below 1MHz.
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