DS80C410 Datasheet, PDF (23/102 Pages) Dallas Semiconductor – Network Microcontrollers with Ethernet and CAN

DS80C410/DS80C411 Network Microcontrollers with Ethernet and CAN
NONMULTIPLEXED, 9-CYCLE DATA MEMORY CE0-7 WRITE
PORT 4 ñ CE0 - 3
PORT 6 ñ CE4 - 7
PORT 4/6 ADDRESS
PORT 7
A16 -A21
A16 -A21
A16 -A21
A16 -A21
OW PIN TIMING CHARACTERISTICS (Note 1)
(V_CC3 = 3.0V to 3.6V, V_CC1 = 1.8V ±10%, T_A = -40∞C to +85∞C.)
PARAMETER
SYMBOL
STANDARD
MIN
MAX
Transmit Reset Pulse Low Time
(Note 2)
Transmit Reset Pulse High Time
(Note 2)
tRSTL
tRSTH
500.8
626
508.8
636
Wait Time for Transmit of Presence
Pulse (Notes 2, 3)
tPDH
15
60
Wait Time for Absence of Presence
Pulse (Notes 2, 4)
tPDHCNT
60
75
Presence Pulse Width (Note 2)
Presence Pulse Sampling Time
(Note 2)
tPDL
60
240
tPDS
24
31
Read/Write Data Time Slot
Low Time for Write 1
Low Time for Write 0
Write Data Sampling Time
Read Data Sampling Time
tSLOT
68.8
86
tLOW1
4.8
6
tLOW0
62.4
78
tWDV
15
60
tRDV
12
15
OVERDRIVE
MIN
MAX
50.4
63
59.2
74
2
6
6.4
8
8
24
2.4
4
12
15
0.8
1
8
10
2
6
1.6
2
LONGLINE
MIN
MAX
500.8 626
508.8 636
15
60
60
75
60
240
30.4
38
68.8
86
7.2
9
62.4
78
25
60
20
25
UNITS
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
AC electrical characteristics assume 50% duty cycle for the oscillator, oscillator frequency ≤ 75MHz, and are not 100% production
tested, but are guaranteed by design.
In PMM mode, the master pulls the line low after the first 15ms for the remainder of the standard speed 1-Wire routine.
This parameter quantifies the wait time for the slave devices to respond to the reset pulse and is dependent on the slave device
timing.
This parameter quantifies the wait time for the case when no presence pulse detected.
The maximum timing figures shown apply only when an exact 1-Wire clock frequency can be achieved from the microcontroller
input clock.
23 of 102