MAX1497 Datasheet, PDF (19/33 Pages) Maxim Integrated Products – 3.5- and 4.5-Digit, Single-Chip ADCs with LED Drivers and μC Interface

3.5- and 4.5-Digit, Single-Chip ADCs with LED
Drivers and µC Interface
Control and Status Registers
Command Byte (Write Only)
MSB
Bit 7
START(1)
Bit 6
R/W
Bit 5
RS4
Bit 4
RS3
START: Start bit. The first 1 clocked into the MAX1497/
MAX1499 is the first bit of the command byte.
(R/W): Read/Write. Set this bit to 1 to read from the
specified register. Set this bit to zero to write to the
selected register. Note that certain registers are read
LSB
Bit 3
Bit 2
Bit 1
Bit 0
RS2
RS1
RS0
X
only. Write commands to a read-only register are
ignored.
(RS4–RS0): Register address bits. RS4 to RS0 specify
which register is accessed.
X: Don’t care.
Status Register (Read Only)
MSB
SIGN
OVER
UNDER
LOW_BATT
Default values: 00h
This register contains the status of the conversion
results.
SIGN: Latched negative-polarity indicator. Latches
high when the result is negative. Clears by reading the
status register, unless the condition remains true.
OVER: Overrange bit. Latches high if an overrange
condition occurs (the ADC result is larger than the
value in the overrange register). Clears by reading the
status register, unless the condition remains true.
UNDER: Underrange bit. Latches high if an under-
range condition occurs (the ADC result is less than the
LSB
DRDY
0
0
0
value in the underrange register). Clears by reading the
status register, unless the condition remains true.
LOW_BATT: Low-battery bit. Latches high if the volt-
age at the LOWBATT is lower than 2.048V (typ). Clears
by reading the status register, unless the condition
remains true. For the MAX1497, LOWBATT is not used
and the LOWBATT bit always returns to zero.
DRDY: Data ready bit. Latches high to indicate a com-
pleted conversion result with valid data. Read the ADC
result register to clear this bit.
Control Register (Read/Write)
MSB
Bit 15
SPI/ADC
Bit 14
EXTCLK
Bit 13
INTREF
Bit 12
DPON
Bit 7
HOLD
Bit 6
PEAK
Bit 5
RANGE
Bit 4
CLR
Default values: 0001h
This register is the primary control register for the
MAX1497/MAX1499. It is a 16-bit read/write register. It
is used to indicate the desired clock and reference
source. It sets the LED display controls, range modes,
power-down modes, offset calibration, and the reset
register function (CLR).
Bit 11
DPSET2
Bit 10
DPSET1
Bit 3
SEG_SEL
Bit 2
OFFSET_CAL1
Bit 9
PD_DIG
Bit 1
OFFSET_
CAL2
Bit 8
PD_ANA
LSB
Bit 0
ENABLE
ENABLE: (default = 1) LED driver enable bit. When set to
1, the MAX1497/MAX1499 enables the LED display dri-
vers. A 0 in this location disables the LED display drivers.
OFFSET_CAL2: (default = 0) Enhanced offset-calibra-
tion start bit (MAX1499, RANGE = 1). To achieve the
lowest possible offset in the ±200mV input range, per-
form an enhanced offset calibration by setting this bit to
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