MAX1438 Datasheet, PDF (18/22 Pages) Maxim Integrated Products – Octal, 12-Bit, 65Msps, 1.8V ADC with Serial LVDS Outputs Serial LVDS Outputs

Octal, 12-Bit, 65Msps, 1.8V ADC
with Serial LVDS Outputs
ADC FULL-SCALE = REFT - REFB
REFT
REFB
REFERENCE-
SCALING
AMPLIFIER
G
REFERENCE
BUFFER
REFIO
1V
CONTROL LINE TO
DISABLE REFERENCE
BUFFER
REFADJ
0.1µF
25kΩ
250kΩ
25kΩ
250kΩ
MAX1438
AVDD AVDD/2
Figure 9. Circuit Suggestions to Adjust the ADC’s Full-Scale
Range
FSR
=
⎛
0.7V _⎝⎜1
−
1.25kΩ
R_ADJ
⎞
⎠⎟
for R_ADJ connected between REFADJ and GND.
Using Transformer Coupling
An RF transformer (Figure 10) provides an excellent
solution to convert a single-ended input source signal
to a fully differential signal. The MAX1438 input com-
mon-mode voltage is internally biased to 0.76V (typ)
with f_CLK = 65MHz. Although a 1:1 transformer is
shown, a step-up transformer can be selected to
reduce the drive requirements. A reduced signal swing
from the input driver, such as an op amp, can also
improve the overall distortion.
Grounding, Bypassing, and Board Layout
The MAX1438 requires high-speed board layout design
techniques. Refer to the MAX1434/MAX1436/MAX1437/
MAX1438 EV kit data sheet for a board layout refer-
ence. Locate all bypass capacitors as close to the
device as possible, preferably on the same side as the
ADC, using surface-mount devices for minimum induc-
tance. Bypass AVDD to GND with a 0.1µF ceramic
capacitor in parallel with a 0.1µF ceramic capacitor.
Bypass OVDD to GND with a 0.1µF ceramic capacitor
in parallel with a ≥ 2.2µF ceramic capacitor. Bypass
0.1µF
V_IN
1
6
T1
N.C. ²
5
3
4
MINI-CIRCUITS
ADT1-1WT
10Ω
39pF
0.1µF
10Ω
39pF
IN_P
MAX1438
IN_N
Figure 10. Transformer-Coupled Input Drive
CVDD to GND with a 0.1µF ceramic capacitor in paral-
lel with a ≥ 2.2µF ceramic capacitor.
Multilayer boards with ample ground and power planes
produce the highest level of signal integrity. Connect
MAX1438 ground pins and the exposed pad to the
same ground plane. The MAX1438 relies on the
exposed-pad connection for a low-inductance ground
connection. Isolate the ground plane from any noisy
digital system ground planes.
Route high-speed digital signal traces away from the
sensitive analog traces. Keep all signal lines short and
free of 90° turns.
Ensure that the differential analog input network layout is
symmetric and that all parasitics are balanced equally.
Refer to the MAX1434/MAX1436/MAX1437/MAX1438 EV
kit data sheet for an example of symmetric input layout.
Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from a straight line. For the
MAX1438, this straight line is between the end points of
the transfer function, once offset and gain errors have
been nullified. INL deviations are measured at every
step and the worst-case deviation is reported in the
Electrical Characteristics table.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step width and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees no
missing codes and a monotonic transfer function. For
the MAX1438, DNL deviations are measured at every
step and the worst-case deviation is reported in the
Electrical Characteristics table.
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