MAX1535A Datasheet, PDF (17/39 Pages) Maxim Integrated Products – Highly Integrated Level 2 SMBus Battery Charger

Highly Integrated Level 2 SMBus
Battery Charger
In power fail, PDS turns off the input P-channel
MOSFET switch and the POWER_FAIL bit (bit 13) in
the ChargerStatus() register is set to 1.
• Battery present. When THM is less than 91% of V_DD,
the battery is considered to be present. The
MAX1535A uses the THM pin to detect whether a
battery is connected to the charger. When the bat-
tery is present, the BATTERY_PRESENT bit (bit 14)
in the ChargerStatus() register is set to 1.
• Battery undervoltage. When BATT is less than 2.5V,
the battery is considered to be in an undervoltage
state. This condition causes the charger to reduce
its current compliance to 128mA. The content of the
ChargeCurrent() register is unaffected. When the
BATT voltage exceeds 2.7V, normal charging
resumes. ChargeVoltage() is unaffected and can be
set as low as 1.024V.
• V_DD undervoltage. When V_DD is less than 2.5V, the
V_DD supply is considered to be in an undervoltage
state. The SMBus interface does not respond to
commands. Coming out of the undervoltage condi-
tion, the part is in its POR state. No charging occurs
when V_DD is in the undervoltage state.
SMBus Interface
The MAX1535A receives control inputs from the SMBus
interface. The serial interface complies with the SMBus
protocols as documented in System Management Bus
Specification V1.1 and can be downloaded from
www.sbs-forum.org. The charger functionality complies
with Intel/Duracell smart charger specifications for a
level 2 charger, as well as supporting input current limit
and power source selection functions.
The MAX1535A uses the SMBus Read-Word and Write-
Word protocols (Figure 3) to communicate with the bat-
a) Write-Word Format
S
SLAVE
ADDRESS
W
ACK
COMMAND
BYTE
ACK
LOW
DATA
BYTE
ACK
HIGH
DATA
BYTE
ACK P
7 bits 1b 1b
MSB LSB 0 0
Preset to
0b0001001
b) Read-Word Format
8 bits
MSB LSB
ChargerMode() = 0x12
ChargeCurrent() = 0x14
ChargeVoltage() = 0x15
AlarmWarning() = 0x16
InputCurrent() = 0x3F
1b
8 bits
1b
8 bits
1b
0 MSB LSB 0 MSB LSB 0
D7
D0
D15
D8
S
SLAVE
ADDRESS
W
ACK
COMMAND
BYTE
ACK
S
SLAVE
ADDRESS
R
ACK
LOW
DATA
BYTE
ACK
HIGH
DATA
BYTE
NACK P
7 bits 1b 1b
8 bits
1b
MSB LSB 0 0
MSB LSB
0
Preset to
0b0001001
ChargerSpecInfo() =
0x11
ChargerStatus() =
0x13
7 bits 1b
MSB LSB 1
Preset to
0b0001001
1b
8 bits
1b
8 bits
1b
0 MSB LSB 0 MSB LSB 1
D7
D0
D15
D8
LEGEND:
S = START CONDITION or REPEATED START CONDITION
ACK = ACKNOWLEDGE (LOGIC LOW)
W = WRITE BIT (LOGIC LOW)
P = Stop Condition
NACK = NOT ACKNOWLEDGE (LOGIC HIGH)
R = READ BIT (LOGIC HIGH)
MASTER TO SLAVE
SLAVE TO MASTER
Figure 3. SMBus a) Write-Word and b) Read-Word Protocols
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