MAX15046_10 Datasheet, PDF (16/24 Pages) Maxim Integrated Products – 40V, High-Performance, Synchronous Buck Controller

40V, High-Performance, Synchronous
Buck Controller
Compensation Design
The MAX15046 provides an internal transconductance
amplifier with the inverting input and the output available
for external frequency compensation. The flexibility of
external compensation offers wide selection of output
filtering components, especially the output capacitor.
Use high-ESR aluminum electrolytic capacitors for cost-
sensitive applications. Use low-ESR tantalum or ceramic
capacitors at the output for size-sensitive applications.
The high switching frequency of the MAX15046 allows
the use of ceramic capacitors at the output. Choose all
passive power components to meet the output ripple,
component size, and component cost requirements.
Choose the compensation components for the error
amplifier to achieve the desired closed-loop bandwidth
and phase margin.
To choose the appropriate compensation network type,
the power-supply poles and zeros, the zero-crossover
frequency, and the type of the output capacitor must be
determined first.
In a buck converter, the LC filter in the output stage intro-
duces a pair of complex poles at the following frequency:
f_PO = _{2π ×}
1
L _OUT × C_OUT
The output capacitor introduces a zero at:
f_ZO
=
2π
1
× ESR ×
C _OUT
where ESR is the equivalent series resistance of the
output capacitor.
The loop-gain crossover frequency (fO), where the loop
gain equals 1 (0dB) should be set below 1/10th of the
switching frequency:
f_O
≤
f_SW
10
Choosing a lower crossover frequency reduces the
effects of noise pickup into the feedback loop, such as
jittery duty cycle.
To maintain a stable system, two stability criteria must
be met:
1) The phase shift at the crossover frequency, fO, must
be less than 180N. In other words, the phase margin
of the loop must be greater than zero.
2) The gain at the frequency where the phase shift is
-180N (gain margin) must be less than 1.
Maintain a phase margin of around 60N to achieve a robust
loop stability and well-behaved transient response.
When using an electrolytic or large-ESR tantalum output
capacitor, the capacitor ESR zero fZO typically occurs
between the LC poles and the crossover frequency fO
(fPO < fZO < fO). Choose the Type II (PI-Proportional,
Integral) compensation network.
When using a ceramic or low-ESR tantalum output
capacitor, the capacitor ESR zero typically occurs above
the desired crossover frequency fO, that is fPO < fO <
fZO. Choose the Type III (PID- Proportional, Integral, and
Derivative) compensation network.
Type II Compensation Network
(Figure 3)
If fZO is lower than fO and close to fPO, the phase lead of
the capacitor ESR zero almost cancels the phase loss of
one of the complex poles of the LC filter around the cross-
over frequency. Use a Type II compensation network with
a midband zero and a high-frequency pole to stabilize
the loop. In Figure 3, RF and CF introduce a midband
zero (fZ1). RF and CCF in the Type II compensation net-
work provide a high-frequency pole (fP1), which mitigates
the effects of the output high-frequency ripple.
Use the following steps to calculate the component
values for Type II compensation network as shown in
Figure 3:
1) Calculate the gain of the modulator (GAINMOD),
comprised of the regulator’s pulse-width modulator,
LC filter, feedback divider, and associated circuitry
at crossover frequency:
GAIN_MOD
=
V_IN
V_RAMP
×
(2π
×
ESR
f_O × L _OUT )
×
V_FB
V_OUT
where VIN is the input voltage of the regulator, VRAMP
is the amplitude of the ramp in the pulse-width modula-
tor, VFB is the FB input voltage set point (0.6V typically,
see the Electrical Characteristics table), and VOUT is the
desired output voltage.
The gain of the error amplifier (GAINEA) in midband
frequencies is:
GAINEA = gM x RF
where gM is the transconductance of the error amplifier.
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