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MAX1438B Datasheet, PDF (16/21 Pages) Maxim Integrated Products – Octal, 12-Bit, 64Msps, 1.8V ADC with Serial LVDS Outputs
Octal, 12-Bit, 64Msps, 1.8V ADC
with Serial LVDS Outputs
Table 2. Output Code Table (VREFIO = 1.24V)
TWO’S-COMPLEMENT DIGITAL OUTPUT CODE
BINARY
D11 → D0
HEXADECIMAL EQUIVALENT
OF D11 → D0
DECIMAL EQUIVALENT
OF D11 → D0
0111 1111 1111
0111 1111 1110
0x7FF
0x7FE
+2047
+2046
0000 0000 0001
0x001
+1
0000 0000 0000
0x000
0
1111 1111 1111
0xFFF
-1
1000 0000 0001
1000 0000 0000
0x801
0x800
-2047
-2048
VIN_P - VIN_N (mV)
(VREFIO = 1.24V)
+699.66
+699.32
+0.34
0
-0.34
-699.66
-700.00
1 LSB =2 x FSR
4096
FSR
0x7FF
0x7FE
0x7FD
FSR = 700mV xVREFIO
1.24V
FSR
0x001
0x000
0xFFF
0x803
0x802
0x801
0x800
-2047 -2045
-1 0 +1
+2045 +2047
DIFFERENTIAL INPUT VOLTAGE (LSB)
Figure 6. Two’s-Complement Transfer Function
Output Data Transfer Function
The MAX1438B output data format is two’s comple-
ment. The following equation, Table 2, and Figure 6
define the relationship between the digital output and
the analog input:
VIN _ P
−
VIN _ N
=
FSR
×
2
×
CODE10
4096
where CODE10 is the decimal equivalent of the digital
output code as shown in Table 2.
Keep the capacitive load on the MAX1438B digital out-
puts as low as possible.
LVDS and SLVS Selection (SLVS/LVDS)
Drive SLVS/LVDS low for LVDS or drive SLVS/LVDS high
for SLVS levels at the MAX1438B outputs (OUT_P,
OUT_N, CLKOUTP, CLKOUTN, FRAMEP, and FRAMEN).
For SLVS levels, enable double-termination by driving DT
high. See the Electrical Characteristics table for LVDS
and SLVS output voltage levels.
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