English
Language : 

MAX1438B Datasheet, PDF (11/21 Pages) Maxim Integrated Products – Octal, 12-Bit, 64Msps, 1.8V ADC with Serial LVDS Outputs
Octal, 12-Bit, 64Msps, 1.8V ADC
with Serial LVDS Outputs
Pin Description (continued)
PIN
NAME
FUNCTION
43
CLKOUTP Positive LVDS/SLVS Serial-Clock Output
45
OUT3N Channel 3 Negative LVDS/SLVS Output
46
OUT3P Channel 3 Positive LVDS/SLVS Output
47
OUT2N Channel 2 Negative LVDS/SLVS Output
48
OUT2P Channel 2 Positive LVDS/SLVS Output
50
OUT1N Channel 1 Negative LVDS/SLVS Output
51
OUT1P Channel 1 Positive LVDS/SLVS Output
53
OUT0N Channel 0 Negative LVDS/SLVS Output
54
OUT0P Channel 0 Positive LVDS/SLVS Output
LVDS Test Pattern Enable. Force LVDSTEST high to enable the output test pattern, 0000 1011 1101.
55
LVDSTEST As with the analog conversion results, the test pattern data are output LSB first. Force LVDSTEST
low for normal operation.
56
STBY
Standby Input. Force STBY high to put the MAX1438B into standby mode. In standby, the reference
circuitry remains active. Force STBY low for normal operation.
57
PLL3
PLL Control Input 3. See Table 1 for details.
58
PLL2
PLL Control Input 2. See Table 1 for details.
59
PLL1
PLL Control Input 1. See Table 1 for details.
Negative Reference Bypass Output. Connect a capacitor of at least 1µF (10µF typ) between REFP
61
REFN and REFN, and connect a capacitor of at least 1µF (10µF typ) between REFN and GND. Place the
capacitors as close as possible to the device on the same side of the PCB as the MAX1438B.
Positive Reference Bypass Output. Connect a capacitor of at least 1µF (10µF typ) between REFP
62
REFP and REFN, and connect a capacitor of at least 1µF (10µF typical) between REFN and GND. Place
the capacitors as close as possible to the device on the same side of the PCB as the MAX1438B.
Reference Input/Output. For internal reference operation (REFADJ = GND), the reference output
63
REFIO voltage is 1.24V. For external reference operation (REFADJ = AVDD), apply a stable reference
voltage at REFIO. Bypass to GND with a capacitor of at least 0.1µF.
Internal/External Reference Mode Select and Reference Adjust Input. For internal reference, connect
64
REFADJ REFADJ to GND. For external reference, connect REFADJ to AVDD. For adjusting the reference, see
the Full-Scale Range Adjustments Using the Internal Reference section.
65
CMOUT
Common-Mode Reference Voltage Output. CMOUT outputs the input common-mode voltage for
DC-coupled applications. Bypass CMOUT to GND with a capacitor of at least 0.1µF.
66
IN0P
Channel 0 Positive Input
67
IN0N
Channel 0 Negative Input
—
EP
Exposed Pad. Internally connected to GND. Connect EP to a large ground plane for maximum
thermal performance. Must be connected to GND.
______________________________________________________________________________________ 11