MAX109 Datasheet, PDF (16/29 Pages) Maxim Integrated Products – 8-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs

8-Bit, 2.2Gsps ADC with Track/Hold Amplifier
and 1:4 Demultiplexed LVDS Outputs
PIN
U7
V7
U9
V9
W19
A20, C20
Pin Description (continued)
NAME
FUNCTION
A1P True/Positive Output Bit A1P, PortA, Bit 1
A1N Complementary/Negative Output Bit A1N, PortA, Bit 1
A0P True/Positive Output Bit A0P, PortA, Bit 0
A0N Complementary/Negative Output Bit A0N, PortA, Bit 0
TEMPMON Temperature Monitor Output. Resulting output voltage corresponds to die temperature.
T.P.
Test Point. Do not connect.
Detailed Description
The MAX109 is an 8-bit, 2.2Gsps flash analog-to-digital
converter (ADC) with an on-chip T/H amplifier and 1:4
demultiplexed high-speed LVDS outputs. The ADC
(Figure 1) employs a fully differential 8-bit quantizer and
a unique encoding scheme to limit metastable states
and ensures no error exceeds a maximum of 1 LSB.
An integrated 1:4 output demultiplexer simplifies inter-
facing to the part by reducing the output data rate to
one-quarter the sampling clock rate. This demultiplexer
circuit has integrated reset capabilities that allow multi-
ple MAX109 converters to be time-interleaved to
achieve higher effective sampling rates.
When clocked at 2.2Gsps, the MAX109 provides a typical
effective number of bits (ENOB) of 6.9 bits at an analog
input frequency of 1600MHz. The MAX109 analog input is
designed for both differential and single-ended use with a
500mV_P-P full-scale input range. In addition, this fast ADC
features an on-chip 2.5V precision bandgap reference. In
order to improve the MAX109 gain error further, an exter-
nal reference may be used (see the Internal Reference
section).
Principle of Operation
The architecture of the MAX109 provides the fastest
multibit conversion of all common integrated ADC
designs. The key to its architecture is an innovative,
high-performance comparator design. The MAX109
quantizer and its encoding logic translate the compara-
tor outputs into a parallel 8-bit output code and pass
the binary code on to the 1:4 demultiplexer. Four sepa-
rate ports (PortA, PortB, PortC, and PortD) output true
LVDS data at speeds of up to 550Msps per port
(depending on how the demultiplexer section is set on
the MAX109).
The ideal transfer function appears in Figure 2.
OVERRANGE + 255
255
254
129
128
127
126
3
2
1
OVERRANGE 0
0
ANALOG INPUT
Figure 2. Ideal Transfer Function
On-Chip Track/Hold Amplifier
As with all ADCs, if the input waveform is changing
rapidly during conversion, ENOB and signal-to-noise
ratio (SNR) specifications will degrade. The MAX109’s
on-chip, wide-bandwidth (2.8GHz) T/H amplifier
reduces this effect and increases the ENOB perfor-
mance significantly, allowing precise capture of fast-
changing analog data at high conversion rates.
The T/H amplifier accepts and buffers both DC- and
AC-coupled analog input signals and allows a full-scale
signal input range of 500mV_P-P. The T/H amplifier’s dif-
ferential 50Ω input termination simplifies interfacing to
the MAX109 with controlled impedance lines. Figure 3
shows a simplified diagram of the T/H amplifier stage
internal to the MAX109.
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