DS8313 Datasheet, PDF (16/18 Pages) Maxim Integrated Products – Smart Card Interface

Smart Card Interface
Applications Information
Performance can be affected by the layout of the appli-
cation. For example, an additional cross-capacitance of
1pF between card reader contacts C2 (RST) and C3
(CLK) or C2 (RST) and C7 (I/O) can cause contact C2
to be polluted with high-frequency noise from C3 (or
C7). In this case, include a 100pF capacitor between
contacts C2 and CGND.
Application recommendations include the following:
• Ensure there is ample ground area around the
DS8313/DS8314 and the connector; place the
DS8313/DS8314 very near to the connector; decou-
ple the V_DD and V_DDA lines separately. These lines
are best positioned under the connector.
• The device and the host microcontroller must use
the same V_DD supply. Pins CLKDIV1, CLKDIV2,
RSTIN, PRES, I/OIN, 5V/3V, 1_8V, CMDVCC, and
OFF are referenced to V_DD; if pin XTAL1 is to be
driven by an external clock, also reference this pin
to V_DD.
• Trace C3 (CLK) should be placed as far as possi-
ble from the other traces.
• The trace connecting CGND to C5 (GND) should
be straight (the two capacitors on C1 (V_CC) should
be connected to this ground trace).
• Avoid ground loops between CGND and GND.
• Decouple V_DDA and V_DD separately. If two sup-
plies are the same in the application, they should
be connected in a star on the main trace
With all these layout precautions, noise should be kept to
an acceptable level and jitter on C3 (CLK) should be less
than 100ps. Reference layouts are available on request.
Technical Support
For technical support, go to https://support.maxim-
ic.com/micro.
Selector Guide
PART
LOW STOP-MODE
POWER
LOW ACTIVE-
MODE POWER
PRES POLARITY
DS8313-RRX+
Yes
Yes
Positive
DS8313L-RRX+*
Yes
Yes
Negative
DS8314-RRX+*
Yes
Yes
Positive
DS8314L-RRX+*
Yes
Yes
Negative
Note: Contact the factory for availability of other variants and package options.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*Future product—contact factory for availability.
V_DDA INPUTS
2
2
1
1
PIN-PACKAGE
28 SO
28 SO
28 SO
28 SO
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