MAX1536 Datasheet, PDF (14/19 Pages) Maxim Integrated Products – 3.6A, 1.4MHz, Low-Voltage, Internal-Switch Step-Down Regulator with Dynamic Output Voltage Control

3.6A, 1.4MHz, Low-Voltage, Internal-Switch Step-
Down Regulator with Dynamic Output Voltage Control
R_A
=
R_B
⎛
⎝⎜
V_OUT
V_FB
-1^{⎞⎠⎟}
where V_FB = V_REFIN.
Setting Dynamic Output Voltages with REFIN
The MAX1536 regulates V_FB to be equal to V_REFIN.
Changing V_REFIN allows for a dynamic output voltage
that changes between two set points (see the
Multioutput Voltage Settings section for information on
three or more output-voltage set points). Figure 1 shows
a dynamically adjustable resistive voltage-divider net-
work at REFIN. Keep V_REFIN between 0.7V and 2V.
Keep V_REFIN below V_CC - 1.35V to avoid an undervolt-
age lockout condition. Toggling GATE switches in and
out the resistor connected between OD and AGND
changing V_REFIN. A logic high on GATE turns on the
internal N-channel MOSFET, forcing OD to a low-imped-
ance state. A low logic on GATE turns off the internal N-
channel MOSFET, making OD high impedance. The
output voltage is determined by the following equations:
V_OUT
=
V_FB
⎛⎝⎜_{1 +}
R_A
R_B
⎞
⎠⎟
V_FB(LOW)
=
V_REF
⎛ _R2 ⎞
⎝⎜ ^{R1 + R2}⎠⎟
V_FB(HIGH)
=
V_REF
⎛
⎝⎜
R2 + R3
R1 + R2 + R3
⎞
⎠⎟
The MAX1536 automatically enters forced-PWM opera-
tion on the rising and falling edges of GATE, and
remains in forced-PWM mode for a minimum time
selected by FBLANK (Table 3). Forced-PWM operation
is required to ensure fast, accurate negative voltage
transitions when REFIN is lowered. Since forced-PWM
operation disables the zero-crossing comparator, the
inductor current can reverse under light loads, quickly
discharging the output capacitors. The MAX1536 also
forces PGOOD to a high-impedance state for the peri-
od selected by FBLANK (Table 3).
For a step-voltage change at REFIN, the rate of change
of the output voltage is limited by the inductor current
ramp, the total output capacitance, the current limit,
and the load during the transition. The voltage across
the inductor and the inductance limits the inductor cur-
rent ramp. The total output capacitance determines
how much current is needed to change the output volt-
age. Additional load current slows down the output volt-
age change during a positive REFIN voltage change,
and speeds up the output voltage change during a
negative REFIN voltage change.
Adding a capacitor across REFIN and AGND filters
noise and controls the rate of change of the REFIN volt-
age during dynamic transitions. With the additional
capacitance, the REFIN voltage slews between the two
set points with a time constant given by the equivalent
parallel resistance seen by the slew capacitor C_REFIN.
As shown in Figure 1, the time constant for a positive
REFIN voltage transition is:
( ) _τPOS
=
⎛ _{R1 x R2}
⎜
⎝
R1 + R2
+
+
R3
R3
⎞
⎟
⎠
C_REFIN
and the time constant for a negative REFIN voltage
transition is:
τ_NEG
=
⎛
⎝⎜
R1 x
R1 +
R2 ^⎞
R2 _⎠⎟
C_REFIN
During a negative REFIN voltage transition, the MAX1536
sinks current to discharge the output capacitor and bring
the output voltage down to the new set point. The
MAX1536 does not have a negative current limit, so
τ_NEG must be set long enough to keep the sinking cur-
rent within the maximum current capability of the IC:
τ_{NEG ≥}
C_OUT x ΔV_OUT
I_SINK
and
I_SINK
≤
I_LIMIT
Programming the No-Load Switching
Frequency and Off-Time
The MAX1536 features a programmable PWM mode
switching frequency, which is set by the input and out-
put voltage and the value of R_TOFF. R_TOFF sets the
PMOS power switch off-time in PWM mode. Use the fol-
lowing equation to select the off-time according to the
desired no-load switching frequency in PWM mode:
t_OFF
=
V_IN - V_OUT
f_PWM x V_IN
where:
t_OFF = the programmed off-time.
V_IN = the input voltage.
V_OUT = the output voltage.
f_PWM = no-load switching frequency, PWM mode.
Select R_TOFF according to the formula:
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