MAX1536 Datasheet, PDF (12/19 Pages) Maxim Integrated Products – 3.6A, 1.4MHz, Low-Voltage, Internal-Switch Step-Down Regulator with Dynamic Output Voltage Control

3.6A, 1.4MHz, Low-Voltage, Internal-Switch Step-
Down Regulator with Dynamic Output Voltage Control
Shutdown (SHDN)
Drive SHDN low to disable the MAX1536 and reduce
the supply current to less than 1µA. In shutdown, all cir-
cuitry and internal MOSFETs turn off, and the LX node
becomes high impedance. Drive SHDN high or con-
nect to V_CC for normal operation.
Summing Comparator
Three signals are added together at the input of the
summing comparator (Figure 2): an output-voltage
error signal relative to the reference voltage, an inte-
grated output-voltage error signal, and the sensed
PMOS switch current. The transconductance amplifier
with an external capacitor between COMP and V_CC
provides an integrated error signal. This integrator pro-
vides high DC accuracy without the need for a high-
gain amplifier (see the Integrator Amplifier section).
Power-Good Output (PGOOD)
PGOOD is an open-drain output that indicates if the
output voltage is in regulation. PGOOD is actively held
low in shutdown and during soft-start. After the soft-
start terminates, PGOOD becomes high impedance as
long as the output voltage is within ±10% of the nominal
regulation voltage.
Once the MAX1536 has started, PGOOD pulls low when
the output voltage drops 10% below or rises 10% above
the nominal regulation voltage. PGOOD returns to high
impedance when the output voltage regains regulation.
For logic-level output voltages, connect a 100kΩ external
pullup resistor between PGOOD and V_CC.
PGOOD is forced high impedance during the transition
period selected by FBLANK (see the Fault Blanking
section).
Table 3. FBLANK Configuration Table
FBLANK
FAULT BLANKING
TYPICAL FORCED-PWM
DURATION (µs)
V_CC
Enabled
150
Open
Enabled
100
REF
Enabled
50
AGND
Disabled
100
Fault Blanking (FBLANK)
The MAX1536 automatically enters forced-PWM opera-
tion for a predefined period following any GATE transi-
tion. The FBLANK control input determines how long the
MAX1536 maintains forced-PWM operation (Table 3).
When fault blanking is enabled (FBLANK = V_CC, open,
or REF), the MAX1536 forces PGOOD to a high-imped-
ance state during the transition period selected by
FBLANK (Table 3). This prevents the PGOOD signal
from going low when the output-voltage change
(ΔV_OUT) cannot occur as fast as the change in REFIN
voltage (ΔV_REFIN).
Synchronous Rectification
In a nonsynchronous step-down regulator, an external
Schottky diode provides a path for current to flow when
the inductor is discharging. The MAX1536 synchronous
rectifier replaces the external Schottky diode with an
internal low-resistance NMOS switch reducing conduc-
tion losses and improving efficiency (Figure 3). There is
typically 40ns of delay between MOSFET transitions,
thus preventing cross conduction or “shoot through.”
NONSYNCHRONOUS STEP-DOWN SWITCHING REGULATOR
V_IN
C_IN
SYNCHRONOUS STEP-DOWN SWITCHING REGULATOR
V_IN
C_IN
L
V_OUT
C_OUT
L
V_OUT
C_OUT
SYNCHRONOUS
RECTIFIER
Figure 3. Step-Down Switching Regulator
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