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MAX1146 Datasheet, PDF (14/25 Pages) Maxim Integrated Products – Multichannel, True-Differential, Serial, 14-Bit ADCs | |||
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Multichannel, True-Differential,
Serial, 14-Bit ADCs
10â¦
AIN
0.01µF
0.01µF
CH7
MAX1148
MAX1149
VDD
DIN
SHDN
REFADJ
SCLK
DOUT
SSTRB
VREF
REF
2.2µF
COM
CS
DGND
AGND
0.1µF
VDD
10â¦
4.7µF
EXTERNAL CLOCK
OSCILLOSCOPE
SCLK
DOUT*
SSTRB
CH1
CH2
CH3
CH4
MAX1149 VREF = +2.500V
MAX1148 VREF = +4.096V VCOM ⤠AIN ⤠VREF
Figure 7. Quick-Look Circuit
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FFF HEX
Table 1. Control Byte Format
BIT
7 (MSB)
6
5
4
3
2
1
0 (LSB)
NAME
START
SEL2
SEL1
SEL0
SGL/DIF
UNI/BIP
PD1
PD0
DESCRIPTION
Start bit. The first logic 1 bit after CS goes low defines the beginning of the control byte.
Channel-select bits. The channel-select bits select which of the eight channels are used for the conversion
(Tables 2, 3, 4, and 5).
1 = single ended, 0 = differential. Selects single-ended or differential conversions. In single-ended mode,
input signal voltages are referred to COM. In differential mode, the voltage difference between two channels
is measured.
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, connect COM to
AGND to perform conversion from 0 to VREF. In bipolar mode, connect COM to VREF/2 to perform conversion
from 0 to VREF. See Table 7.
Selects clock and power-down modes.
PD1 = 0 and PD0 = 0 selects full power-down mode*.
PD1 = 0 and PD0 = 1 selects fast power-down mode*.
PD1 = 1 and PD0 = 0 selects internal clock mode.
PD1 = 1 and PD0 = 1 selects external clock mode.
*The start bit resets power-down modes.
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