MAX1471_11 Datasheet, PDF (13/26 Pages) Maxim Integrated Products – 315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver

315MHz/434MHz Low-Power, 3V/5V
ASK/FSK Superheterodyne Receiver
Table 1. Component Values for Typical Application Circuit
COMPONENT
VALUE FOR 433.92MHz RF
C3
220pF
C4
470pF
C5
0.047µF
C6
0.1µF
C7
100pF
C8
100pF
C9
1.0pF
C10
220pF
C11
100pF
C12
1500pF
C14
15pF
C15
15pF
C21
220pF
C22
470pF
C23
0.01µF
C26
0.1µF
C27
0.047µF
L1
56nH
L2
16nH
L3
10nH
R3
25kΩ
R8
25kΩ
Y1
13.2256MHz
Y2
10.7MHz ceramic filter
Note: Component values vary depending on PCB layout.
*Wire wound recommended.
VALUE FOR 315MHz RF
220pF
470pF
0.047µF
0.1µF
100pF
100pF
2.2pF
220pF
100pF
1500pF
15pF
15pF
220pF
470pF
0.01µF
0.1µF
0.047µF
100nH
30nH
15nH
25kΩ
25kΩ
9.509MHz
10.7MHz ceramic filter
DESCRIPTION (%)
10
5
10
10
5
5
±0.1pF
10
5
10
5
5
10
5
10
10
10
5 or better*
5 or better*
5 or better*
5
5
Crystek or Hong Kong X’tals
Murata SFECV10.7 series
C_F1
=
1.000
(^1.414)(^100kΩ)(^3.14)(^5kHz)
≈
450pF
C_F2
=
1.414
(⁴)(^100kΩ)(^3.14)(^5kHz)
≈
225pF
Choosing standard capacitor values changes C_F1 to
470pF and C_F2 to 220pF. In the Typical Application
Circuit, C_F1 and C_F2 are named C4 and C3, respective-
ly, for ASK data, and C21 and C22 for FSK data.
Data Slicers
The purpose of a data slicer is to take the analog output
of a data filter and convert it to a digital signal. This is
achieved by using a comparator and comparing the ana-
log input to a threshold voltage. The threshold voltage is
set by the voltage on the DSA- pin for the ASK receive
chain (DSF- for the FSK receive chain), which is connect-
ed to the negative input of the data slicer comparator.
Numerous configurations can be used to generate the
data-slicer threshold. For example, the circuit in Figure
4 shows a simple method using only one resistor and
one capacitor. This configuration averages the analog
output of the filter and sets the threshold to approxi-
mately 50% of that amplitude. With this configuration,
the threshold automatically adjusts as the analog signal
varies, minimizing the possibility for errors in the digital
data. The sizes of R and C affect how fast the threshold
tracks to the analog amplitude. Be sure to keep the cor-
ner frequency of the RC circuit much lower than the
lowest expected data rate.
With this configuration, a long string of NRZ zeros or
ones can cause the threshold to drift. This configuration
works best if a coding scheme, such as Manchester
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