MAX11108 Datasheet, PDF (12/16 Pages) Maxim Integrated Products – Single-Ended Analog Input 12-Bit Resolution ADC

MAX11108
Tiny, 2.1mm x 1.6mm, 3Msps,
Low-Power, Serial 12-Bit ADC
14-Cycle Conversion Mode
The ICs can operate with 14 cycles per conversion.
Figure 12 shows the corresponding timing diagram.
Observe that DOUT does not go into high-impedance
mode. Also, observe that t_ACQ needs to be sufficiently
long to guarantee proper settling of the analog input
voltage. See the Electrical Characteristics table for t_ACQ
requirements and the Analog Input section for a descrip-
tion of the analog inputs.
Applications Information
Layout, Grounding, and Bypassing
For best performance, use PCBs with a solid ground
plane. Ensure that digital and analog signal lines are
separated from each other. Do not run analog and digital
(especially clock) lines parallel to one another or digital
lines underneath the ADC package. Noise in the V_DD
power supply, OVDD, and REF affects the ADC’s perfor-
mance. Bypass the V_DD, OVDD, and REF to ground with
0.1µF and 10µF bypass capacitors. Minimize capacitor
lead and trace lengths for best supply-noise rejection.
Choosing an Input Amplifier
It is important to match the settling time of the input
amplifier to the acquisition time of the ADC. The conver-
sion results are accurate when the ADC samples the
input signal for an interval longer than the input signal’s
worst-case settling time. By definition, settling time is
the interval between the application of an input voltage
step and the point at which the output signal reaches
and stays within a given error band centered on the
resulting steady-state amplifier output level. The ADC
input sampling capacitor charges during the sampling
cycle, referred to as the acquisition period. During this
acquisition period, the settling time is affected by the
input resistance and the input sampling capacitance. This
error can be estimated by looking at the settling of an RC
time constant using the input capacitance and the source
impedance over the acquisition time period.
Figure 13 shows a typical application circuit. The
MAX4430, offering a settling time of 37ns at 16 bits, is
an excellent choice for this application. See the THD
vs. Input Resistance graph in the Typical Operating
Characteristics.
Choosing a Reference
For devices using an external reference, the choice of
the reference determines the output accuracy of the
ADC. An ideal voltage reference provides a perfect initial
accuracy and maintains the reference voltage indepen-
dent of changes in load current, temperature, and time.
Considerations in selecting a reference include initial
voltage accuracy, temperature drift, current source, sink
capability, quiescent current, and noise. Figure 13 shows
a typical application circuit using the MAX6126 to provide
the reference voltage. The MAX6033 and MAX6043 are
also excellent choices.
5
VDD = 3V
f_SCLK = VARIABLE
4 _{16 CYCLES/CONVERSION}
3
2
1
0
0 500 1000 1500 2000 2500 3000
fS (ksps)
Figure 10. Supply Current vs. Sample Rate (Normal Operating
Mode, 3Msps Devices)
3.0
VDD = 3V
f_SCLK = 48MHz
2.5
2.0
1.5
1.0
0.5
0
0
200 400 600 800 1000
fS (ksps)
Figure 11. Supply Current vs. Sample Rate (Device Powered
Down Between Conversions, 3Msps Devices)
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