MAX1080 Datasheet, PDF (12/24 Pages) Maxim Integrated Products – 300ksps/400ksps, Single-Supply, Low-Power, 8-Channel, Serial 10-Bit ADCs with Internal Reference

300ksps/400ksps, Single-Supply, Low-Power,
8-Channel, Serial 10-Bit ADCs with Internal Reference
Track/Hold
The T/H enters its tracking mode on the falling clock
edge after the fifth bit of the 8-bit control word has been
shifted in. It enters its hold mode on the falling clock
edge after the eighth bit of the control word has been
shifted in. If the converter is set up for single-ended
inputs, IN- is connected to COM and the converter con-
verts the “+” input. If the converter is set up for differen-
tial inputs, the difference of _[(IN+) - (IN-)_] is converted.
At the end of the conversion, the positive input con-
nects back to IN+ and C_HOLD charges to the input sig-
nal.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. The acquisition time,
t_ACQ, is the maximum time the device takes to acquire
the signal and the minimum time needed for the signal
to be acquired. It is calculated by the following equa-
tion:
t_ACQ = 7 ✕ (R_S + R_IN) ✕ 12pF
where R_IN = 800Ω, R_S = the source impedance of the
input signal, and t_ACQ is never less than 468ns
(MAX1080) or 625ns (MAX1081). Note that source
impedances below 4kΩ do not significantly affect the
ADC’s AC performance.
Input Bandwidth
The ADC’s input tracking circuitry has a 6MHz
(MAX1080) or 3MHz (MAX1081) small-signal band-
width, so it is possible to digitize high-speed transient
events and measure periodic signals with bandwidths
exceeding the ADC’s sampling rate by using under-
sampling techniques. To avoid high-frequency signals
being aliased into the frequency band of interest, anti-
alias filtering is recommended.
Analog Input Protection
Internal protection diodes, which clamp the analog input
to V_DD1 and GND, allow the channel input pins to swing
from GND - 0.3V to V_DD1 + 0.3V without damage.
However, for accurate conversions near full scale, the
inputs must not exceed V_DD1 by more than 50mV or be
lower than GND by 50mV.
If the analog input exceeds 50mV beyond the sup-
plies, do not allow the input current to exceed 2mA.
Table 1. Channel Selection in Single-Ended Mode (SGL/DIF = 1)
SEL2
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
CH0
+
CH1
+
CH2
+
CH3
CH4
+
+
CH5
+
CH6
+
CH7
+
COM
–
–
–
–
–
–
–
–
Table 2. Channel Selection in Pseudo-Differential Mode (SGL/DIF = 0)
SEL2
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
CH0
+
–
CH1
–
+
CH2
+
–
CH3
–
+
CH4
+
–
CH5
–
+
CH6
CH7
+
–
–
+
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