M02016 Datasheet, PDF (12/20 Pages) M/A-COM Technology Solutions, Inc. – CMOS Transimpedance Amplifier with AGC for Fiber Optic Networks up to 1.25 Gbps

M02016
CMOS Transimpedance Amplifier with AGC
for Fiber Optic Networks up to 1.25 Gbps
Rev V4
3.2
General Description
3.2.1
TIA (Transimpedance Amplifier)
The transimpedance amplifier consists of a high gain single-ended CMOS amplifier (TIA) with a feedback resistor.
The feedback creates a virtual earth low impedance at the input and virtually all of the input current passes through
the feedback resistor, defining the voltage at the output. Advanced CMOS design techniques are employed to
maintain the stability of this stage across all input conditions.
An on-chip low dropout linear regulator has been incorporated into the design to give excellent noise rejection up to
several MHz. Higher frequency power supply noise is removed by the external 470 pF decoupling capacitor
connected to PINK.
The circuit is designed for PIN photodiodes in the “grounded cathode” configuration, with the anode connected to
the input of the TIA and the cathode connected to AC ground, such as the provided PINK terminal. Reverse DC
bias is applied to reduce the photodiode capacitance. Avalanche photodiodes can be connected externally to a
higher voltage.
3.2.2
AGC
The M02016 has been designed to operate over the input range of +6 dBm to –29 dBm. This represents a ratio of
1:3000 whereas the acceptable dynamic range of the output is only 1:30 which implies a compression of 100:1 in
the transimpedance. The design uses a MOS transistor operating as a “voltage controlled resistor” to achieve the
transimpedance variation.
Another feature of the AGC is that it only operates on signals greater than –22 dBm (@ 0.9 A/W). This knee in the
gain response is important when setting “signal detect” functions in the following post amplifier. It also aids in active
photodiode alignment.
The AGC pad allows the AGC to be disabled during photodiode alignment by grounding the pad through a low
impedance. The AGC control voltage can be monitored during normal operation at this pad by a high impedance
(>10 MΩ) circuit.
3.2.3
Output Stage
The signal from the TIA enters a phase splitter followed by a DC-shift stage and a pair of voltage follower outputs.
These are designed to drive a differential (100Ω) load. They are stable for driving capacitive loads, such as
interstage filters. Each output has its own GND pad, all four GND pads on the chip should be connected for proper
operation. Since the M02016 exhibits rapid roll-off (3 pole), simple external filtering is sufficient.
3.2.4
Monitor O/P
High impedance output sources a replica average photodiode current for photo-alignment use. The accuracy of
this signal does not meet the DDMI Receive Power Specification (SFP-8472) and it is not intended be used as
such. It is possible to use the MACOM M0204x/50 limiting amplifiers’ RxAVG_IN pin to bias the photodiode cathode
to provide an SFP-8472 compliant monitoring function. Ensure that the voltage on V_MON is in the range of 1V to
V_CC.
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