LTC3831_15 Datasheet, PDF (9/20 Pages) Linear Technology – High Power Synchronous Switching Regulator Controller for DDR Memory Termination

LTC3831
APPLICATIONS INFORMATION
back signal is greater than 3% above V_REF. To prevent these
two comparators from triggering due to noise, the MIN and
MAX comparators’ response times are deliberately delayed
by two to three microseconds. These two comparators
help prevent extreme output perturbations with fast output
load current transients, while allowing the main feedback
loop to be optimally compensated for stability.
Thermal Shutdown
The LTC3831 has a thermal protection circuit that dis-
ables both gate drivers if activated. If the chip junction
temperature reaches 150°C, both TG and BG are pulled
low. TG and BG remain low until the junction temperature
drops below 125°C, after which, the chip resumes normal
operation.
Soft-Start and Current Limit
The LTC3831 includes a soft-start circuit that is used for
start-up and current limit operation. The SS pin requires an
external capacitor, CSS, to GND with the value determined
by the required soft-start time. An internal 12μA current
source is included to charge C_SS. During power-up, the
COMP pin is clamped to a diode drop (B-E junction of QSS
in the Block Diagram) above the voltage at the SS pin.
This prevents the error amplifier from forcing the loop to
maximum duty cycle. The LTC3831 operates at low duty
cycle as the SS pin rises above 0.6V (V_COMP ≈ 1.2V). As
SS continues to rise, Q_SS turns off and the error amplifier
takes over to regulate the output. The MIN comparator is
disabled during soft-start to prevent it from overriding the
soft-start function.
The LTC3831 includes yet another feedback loop to control
operation in current limit. Just before every falling edge
of TG, the current comparator, CC, samples and holds the
voltage drop measured across the external upper MOSFET,
Q1, at the I_FB pin. CC compares the voltage at I_FB to the
voltage at the I_MAX pin. As the peak current rises, the
measured voltage across Q1 increases due to the drop
across the R_DS(ON) of Q1. When the voltage at I_FB drops
below I_MAX, indicating that Q1’s drain current has exceeded
the maximum level, CC starts to pull current out of C_SS,
cutting the duty cycle and controlling the output current
level. The CC comparator pulls current out of the SS pin
in proportion to the voltage difference between I_FB and
I_MAX. Under minor overload conditions, the SS pin falls
gradually, creating a time delay before current limit takes
effect. Very short, mild overloads may not affect the output
voltage at all. More significant overload conditions allow
the SS pin to reach a steady state, and the output remains
at a reduced voltage until the overload is removed. Serious
overloads generate a large overdrive at CC, allowing it to
pull SS down quickly and preventing damage to the output
components. By using the R_DS(ON) of Q1 to measure the
output current, the current limiting circuit eliminates an
expensive discrete sense resistor that would otherwise be
required. This helps minimize the number of components
in the high current path.
The current limit threshold can be set by connecting an
external resistor R_IMAX from the I_MAX pin to the main V_IN
supply at the drain of Q1. The value of R_IMAX is determined
by:
R_IMAX = (I_LMAX)(R_DS(ON)Q1)/I_IMAX
where:
I_LMAX = I_LOAD + (I_RIPPLE/2)
I_LOAD = Maximum load current
I_RIPPLE = Inductor ripple current
( ) ⁼
(
)( ^V_IN ^{– V}_OUT ^V_OUT
f_{OSC (}L_{O )}(V_IN)
)
f_OSC = LTC3831 oscillator frequency = 200kHz
L_O = Inductor value
R_DS(ON)Q1 = On-resistance of Q1 at I_LMAX
I_IMAX = Internal 12μA sink current at I_MAX
The R_DS(ON) of Q1 usually increases with temperature.
To keep the current limit threshold constant, the internal
12μA sink current at I_MAX is designed with a positive
temperature coefficient to provide first order correction
for the temperature coefficient of R_DS(ON)Q1.
In order for the current limit circuit to operate properly and
to obtain a reasonably accurate current limit threshold,
the I_IMAX and I_FB pins must be Kelvin sensed at Q1’s drain
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