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LTC3831_15 Datasheet, PDF (16/20 Pages) Linear Technology – High Power Synchronous Switching Regulator Controller for DDR Memory Termination
LTC3831
APPLICATIONS INFORMATION
not for capacitance value. A capacitor with suitable ESR
will usually have a larger capacitance value than is needed
to control steady-state output ripple.
Electrolytic capacitors, such as the Sanyo MV-WX series,
rated for use in switching power supplies with specified
ripple current ratings and ESR, can be used effectively
in LTC3831 applications. OS-CON electrolytic capaci-
tors from Sanyo and other manufacturers give excellent
performance and have a very high performance/size ratio
for electrolytic capacitors. Surface mount applications
can use either electrolytic or dry tantalum capacitors.
Tantalum capacitors must be surge tested and specified
for use in switching power supplies. Low cost, generic
tantalums are known to have very short lives followed by
explosive deaths in switching power supply applications.
Other capacitor series that can be used include Sanyo
POSCAPs and the Panasonic SP line.
A common way to lower ESR and raise ripple current ca-
pability is to parallel several capacitors. A typical LTC3831
application might exhibit 5A input ripple current. Sanyo
OS-CON capacitors, part number 10SA220M (220μF/10V),
feature 2.3A allowable ripple current at 85°C; three in
parallel at the input (to withstand the input ripple current)
meet the above requirements. Similarly, Sanyo POSCAP
4TPB470M (470μF/4V) capacitors have a maximum rated
ESR of 0.04Ω, three in parallel lower the net output capaci-
tor ESR to 0.013Ω.
Feedback Loop Compensation
The LTC3831 voltage feedback loop is compensated at the
COMP pin, which is the output node of the error amplifier.
The feedback loop is generally compensated with an RC +
C network from COMP to GND as shown in Figure 9a.
Loop stability is affected by the values of the inductor,
the output capacitor, the output capacitor ESR, the error
amplifier transconductance and the error amplifier com-
pensation network. The inductor and the output capacitor
create a double pole at the frequency:
fLC = 1/ ⎡⎣2π (LO )(COUT ) ⎤⎦
16
The ESR of the output capacitor and the output capacitor
value form a zero at the frequency:
fESR = 1/ ⎡⎣2π(ESR)(COUT )⎤⎦
The compensation network used with the error amplifier
must provide enough phase margin at the 0dB crossover
frequency for the overall open-loop transfer function. The
zero and pole from the compensation network are:
fZ = 1/[2π(RC)(CC)] and
fP = 1/[2π(RC)(C1)] respectively.
Figure 9b shows the Bode plot of the overall transfer
function.
Although a mathematical approach to frequency compensa-
tion can be used, the added complication of input and/or
output filters, unknown capacitor ESR, and gross operating
LTC3831
COMP
10
ERR
RC
CC
C1
VFB
6
VTT
VREF
3831 F09a
Figure 9a. Compensation Pin Hook-Up
fSW = LTC3831 SWITCHING
fZ
FREQUENCY
fCO = CLOSED-LOOP CROSSOVER
FREQUENCY
20dB/DECADE
fLC
fESR
fCO
fP
FREQUENCY
3830 F10b
Figure 9b. Bode Plot of the LTC3831 Overall Transfer Function
3831fb