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| LTC3831_15 Datasheet, PDF (17/20 Pages) Linear Technology – High Power Synchronous Switching Regulator Controller for DDR Memory Termination | |||
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LTC3831
APPLICATIONS INFORMATION
point changes with input voltage, load current variations,
all suggest a more practical empirical method. This can be
done by injecting a transient current at the load and using
an RC network box to iterate toward the ï¬nal values, or
by obtaining the optimum loop response using a network
analyzer to ï¬nd the actual loop poles and zeros.
Table 2 shows the suggested compensation component
value for 2.5V to 1.25V applications based on the 470μF
Sanyo POSCAP 4TPB470M output capacitors.
Table 3 shows the suggested compensation component
values for 2.5V to 1.25V applications based on 1500μF
Sanyo MV-WX output capacitors.
Table 2. Recommended Compensation Network for 2.5V to 1.25V
Applications Using Multiple Paralleled 470μF Sanyo
POSCAP 4TPB470M Output Capacitors
L1 (μH)
1.2
COUT(μF)
1410
RC(kΩ)
6.8
CC(nF)
3.3
C1(pF)
33
1.2
2820
15
3.3
33
1.2
4700
22
1.5
33
2.4
1410
15
10
33
2.4
2820
36
3.3
10
2.4
4700
47
4.7
10
4.7
1410
33
10
10
4.7
2820
68
22
10
4.7
4700
120
10
10
Table 3. Recommended Compensation Network for 2.5V to 1.25V
Applications Using Multiple Paralleled 1500μF Sanyo
MV-WX Output Capacitors
L1 (μH)
1.2
COUT(μF)
4500
RC(kΩ)
20
CC(nF)
1.5
C1(pF)
120
1.2
6000
27
1
82
1.2
9000
43
0.47
56
2.4
4500
51
1
56
2.4
6000
62
1
33
2.4
9000
82
0.47
27
4.7
4500
82
3.3
33
4.7
6000
100
1
15
4.7
9000
150
1
15
PVCC
VIN
+
4.7μF
C1
RC
CC
100Ω
1μF
GND
NC
VCC
PVCC2
PVCC1
LTC3831 TG
IMAX
FREQSET
IFB
SHDN
R+
COMP
BG
SS
FB
Râ
GND PGND
CSS
GND
1μF 10k
PGND
0.1μF
1k
+
CIN
OPTIONAL
Q1
MBRS340T3
LO
MBRS340T3
Q2
PGND
Figure 10. Typical Schematic Showing Layout Considerations
VOUT
+
COUT
3830 F11
3831fb
17
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