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LTC3625-1_15 Datasheet, PDF (7/16 Pages) Linear Technology – 1A High Efficiency 2-Cell Supercapacitor Charger with Automatic Cell Balancing
LTC3625/LTC3625-1
Pin Functions
VMID (Pin 10): Midpoint of Two Series Supercapacitors.
The pin voltage is monitored and used, along with VOUT ,
to enable or shut down the buck and boost converters
during charging to achieve voltage balancing of the top
and bottom supercapacitors.
VOUT (Pin 11): Output Voltage Pin. Connect VOUT to the
positive terminal of the top supercapacitor. The pin volt-
age is monitored and used, along with VMID, to enable or
shut down the buck and boost converters during charg-
ing to achieve voltage balancing of the top and bottom
supercapacitors.
SW2 (Pin 12): Switch Pin for the Boost Regulator. External
inductor connects between the SW2 pin and VMID. If CTL
is logic high, then SW2 must be connected to SW1.
GND (Exposed Pad Pin 13): Ground. The exposed pad
must be connected to a continuous ground plane on
the printed circuit board directly under the LTC3625/
LTC3625‑1 for electrical contact and to achieve rated
thermal performance.
Block Diagram
PFI
7
8 PFO
1.20V
BOOST REGULATOR
9 PGOOD
4.44V/4.90V (LTC3625)
3.7V/4.16V (LTC3625-1)
SD_BOOST
2A AVG
INPUT CURRENT
SYNCHRONOUS
BOOST CURRENT
REGULATOR
VOUT
11
D
SW2
12
C
VSEL
4
VMID
10
THRESHOLD
DETECTOR
EN
5
CTL
3
MASTER
LOGIC
PROG
6
OVERTEMPERATURE
SHUTDOWN
VIN
VOUT
VMAXER
BUCK REGULATOR
VMID_GOOD
SD_BUCK
REF/R PROGRAMMED
AVG OUTPUT CURRENT
A
SYNCHRONOUS
BUCK CURRENT
REGULATOR
B
1.2V
+
–
VIN
2
SW1
1
GND
13
3625 BD
3625f