LTC3536_15 Datasheet, PDF (7/28 Pages) Linear Technology – 1A Low Noise, Buck-Boost DC/DC Converter

LTC3536
Pin Functions (DFN/MSOP)
RT (Pin 1/Pin 1): Oscillator Frequency Programming
Input. Connect a resistor from RT to GND to program the
internal oscillator frequency. The frequency is given by:
f_OSC (MHz) = 100/R_T (kΩ)
where R_T is in kΩ and f_OSC is between 0.3MHz and 2MHz.
Tying the RT pin to V_IN enables the internal 1.2MHz default
oscillator frequency.
SGND (Pin 2/Pin 2): Ground Connection for the LTC3536.
A ground plane is highly recommended. Sensitive analog
components terminated at ground should connect to the
GND pin with a Kelvin connection, separated from the
high current path.
MODE/SYNC (Pin 3/Pin 3): Pulse Width Modulation/Burst
Mode Selection and Synchronization Input. Driving MODE
to a logic 0 state programs fixed frequency, low noise
PWM operation. Driving MODE to logic 1 state programs
Burst Mode operation for highest efficiency at light loads.
In Burst Mode operation, the output current capability is
significantly less than what is available in PWM operation.
Refer to the Applications Information section of this data
sheet for details. Frequency synchronization is achieved
if a clock pulse is applied to MODE/SYNC. The external
clock pulse amplitude must have an amplitude equal or
higher than 1.2V and duty cycle from 10% and 90%. The
free-running frequency of the LTC3536 oscillator can be
programmed slower or faster than the synchronization
clock frequency.
SW1 (Pin 4/Pin 4): Switch Pin. Connect to internal power
switches A and B. Connect one side of the buck-boost
inductor to SW1. Provide a short wide PCB trace from the
inductor to SW1 to minimize voltage transients and noise.
SW2 (Pin 5/Pin 6): Switch Pin. Connect to internal power
switches C and D. Connect one side of the buck-boost
inductor to SW2. Provide a short wide PCB trace from the
inductor to SW2 to minimize voltage transients and noise.
V_OUT (Pin 6/Pin 7): Output Voltage. This pin is the power
output for the regulator. A low ESR capacitor should be
placed between this pin and the ground plane. The capaci-
tor should be placed as close to this pin as possible and
have a short return path to ground.
V_IN (Pin 7/Pins 8, 9): Power Input for the Converter. A low
ESR 10µF or larger bypass capacitor should be connected
between this pin and ground. The capacitor should be
placed as close to this pin as possible and have a short
return path to ground.
SHDN (Pin 8/Pin 10): Enable Input. A logic 1 on SHDN
activates the buck-boost regulator. A logic 0 on SHDN
deactivates the buck-boost regulator.
FB (Pin 9/Pin 11): Output Voltage Programming Feedback
Divider Input. The regulator output voltage is programmed
by the voltage divider connected to FB. The buck-boost
output is given by the following equation:
V_OUT = 0.6V • (1 + R_TOP/R_BOT) (V)
where R_BOT is a resistor connected between FB and ground
and R_TOP is a resistor connected between FB and V_OUT.
The buck-boost output voltage can be adjusted from 1.8V
to 5.5V.
VC (Pin 10/Pin 12): Error Amplifier Output. Frequency
compensation components are connected between VC
and FB to provide stable operation of the converter. Refer
to the Applications Information section of this data sheet
for design details.
PGND (Exposed Pad Pin 11/Pin 5, Exposed Pad Pin 13):
Power Ground. The exposed pad must be soldered to the
PCB and electrically connected to ground through the
shortest and lowest impedance connection possible.
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