LTC3536_15 Datasheet, PDF (3/28 Pages) Linear Technology – 1A Low Noise, Buck-Boost DC/DC Converter

LTC3536
Electrical Characteristics The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at T_A = 25°C (Note 2). V_IN = 3.3V, V_OUT = 3.3V, R_T = 100kΩ unless otherwise noted.
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Quiescent Current, Active (I_VIN)
Input Current Limit
Peak Current Limit
Burst Mode Peak Current Limit
Reverse Current Limit
V_FB = 0.7V, V_MODE/SYNC = 0V
V_MODE/SYNC = 0V (Note 4)
V_MODE/SYNC = 0V (Note 4)
V_MODE/SYNC = V_IN (Note 4)
(Note 4)
800
µA
l2
2.5
A
3.4
4
A
0.4
0.6
A
l 0.3 0.55
A
NMOS Switch Leakage
PMOS Switch Leakage
NMOS Switch On-Resistance
Switch B, C: SW1 = SW2 = 5.5V, V_IN = 5.5V, V_OUT = 5.5V
Switch A, D: SW1 = SW2 = 0V, V_IN = 5.5V, V_OUT = 5.5V
Switch B (From SW1 to GND) (Note 6)
Switch C (From SW2 to GND) (Note 6)
0.1
1
µA
0.1
1
µA
0.11
Ω
0.1
Ω
PMOS Switch On-Resistance
Frequency Accuracy
Frequency Accuracy Default
Internal Soft-Start Time
Maximum Duty Cycle
Minimum Duty Cycle
Switch A (From V_IN to SW1) (Note 6)
Switch D (From V_OUT to SW2) (Note 6)
R_T = 100k
R_T = V_IN
V_FB from 0.06V to 0.54V
Percentage of Period SW2 is Low in Boost Mode
Percentage of Period SW1 is High in Buck Mode
0.12
Ω
0.145
Ω
l 0.8
1
1.2
MHz
l 0.96 1.2 1.44
MHz
0.6
0.9
1.2
ms
l 88
91
%
l
0
%
Error Amplifier AVOL
90
dB
Error Amplifier Sink Current
FB = 1.3V, VC = 1V
250 300
µA
Error Amplifier Source Current
FB = 0.3V, VC = 0V
400 480
µA
MODE/SYNC Input Logic Threshold
Disable Burst Mode Operation
0.3
1
V
MODE/SYNC External Synchronization
SYNC Level High
SYNC Level Low
l 1.2
l
V
0.4
V
MODE/SYNC Synchronization Frequency
MODE/SYNC Input Current
SHDN Input Logic Threshold
V_MODE/SYNC = 5.5V = V_IN
l 0.3
l 0.3
2
MHz
1
µA
1
V
SHDN Input Current
V_SHDN = 5.5V = V_IN
1
µA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3536 is tested under pulsed load conditions such that
T_J ≈ T_A. The LTC3536E is guaranteed to meet specifications
from 0°C to 125°C junction temperature. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3536I is guaranteed over the full –40°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors. The junction temperature
(T_J, in °C) is calculated from the ambient temperature (T_A, in °C) and
power dissipation (P_D, in watts) according to the formula:
T_J = T_A + (P_D • θ_JA),
where θ_JA (in °C/W) is the package thermal impedance.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 4: Current measurements are performed when the LTC3536 is
not switching. The current limit values measured in operation will be
somewhat higher due to the propagation delay of the comparators.
Note 5: Guaranteed by design characterization and correlation with
statistical process controls.
Note 6: Guaranteed by correlation and design.
3536fa
3