LTC3350_15 Datasheet, PDF (36/46 Pages) Linear Technology – High Current Supercapacitor Backup Controller and System Monitor

LTC3350
Register Descriptions
ctl_reg (0x17)
Control Register: Several Control Functions are grouped into this register.
BIT(S) BIT NAME
DESCRIPTION
0
ctl_strt_capesr
Begin a capacitance and ESR measurement when possible; this bit clears itself
once a cycle begins.
1
ctl_gpi_buffer_en
A one in this bit location enables the input buffer on the GPI pin. With a zero in this
location the GPI pin is measured without the buffer.
2
ctl_stop_capesr
Stops an active capacitance/ESR measurement.
3
ctl_cap_scale
Increases capacitor measurement resolution by 100x, this is used when measuring
smaller capacitors.
15:4
–
Reserved
num_caps (0x1A)
Number of Capacitors: This register shows the state of the CAP_SLCT1, CAP_SLCT0 pins. The value read in this register is the number of capacitors
programmed minus one.
VALUE CAPACITORS
0b00
1 Capacitor Selected
0b01
2 Capacitors Selected
0b10
3 Capacitors Selected
0b11
4 Capacitors Selected
chrg_status (0x1B)
Charger Status Register: This register provides real time status information about the state of the charger system. Each bit is active high.
BIT(S) BIT NAME
DESCRIPTION
0
chrg_stepdown
The synchronous controller is in step-down mode (charging)
1
chrg_stepup
The synchronous controller is in step-up mode (backup)
2
chrg_cv
The charger is in constant voltage mode
3
chrg_uvlo
The charger is in undervoltage lockout
4
chrg_input_ilim
The charger is in input current limit
5
chrg_cappg
The capacitor voltage is above power good threshold
6
chrg_shnt
The capacitor manager is shunting
7
chrg_bal
The capacitor manager is balancing
8
chrg_dis
The charger is temporarily disabled for capacitance measurement
9
chrg_ci
The charger is in constant current mode
10
–
Reserved
11
chrg_pfo
Input voltage is below PFI threshold
15:12 –
Reserved
36
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