LTC3589-2_15 Datasheet, PDF (31/50 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589/LTC3589-1/
LTC3589-2
OPERATION
ON(PB)
PBSTAT
WAKE
PWR_ON
400ms
<5 SEC
µC/µP CONTROL
3589 F06
Figure 6. Power-Up Using the Pushbutton
ON(PB)
PBSTAT
50ms
<5 SEC
WAKE
PWR_ON
µC/µP CONTROL
50ms - LTC3589
2ms - LTC3589-1/
LTC3589-2
3589 F07
Figure 7. Power Down Using Pushbutton
ON(PB)
PBSTAT
WAKE
PWR_ON
50ms - LTC3589
2ms - LTC3589-1/LTC3589-2
5 SEC
µC/µP CONTROL
50ms
3589 F08
Figure 8. Power-Up and Down Using PWR_ON Pin
ON(PB)
PBSTAT
50ms
end of one second and the fault condition has cleared, the
LTC3589 will power-up in the same way shown in Figure 8.
Neither IRQ nor the status registers are cleared by the
fault induced shutdown.
Enable and Power-On Sequencing
Enable Input Pin Operation
The regulator enable input pins facilitate pin-strapping an
output rail to the enable pin of the next regulator in the
desired sequence. The regulator enable inputs normally
have a 0.8V (typical) input threshold. If any enable is driven
HIGH, the remaining enable input thresholds switch to a
more accurate 500mV (typical) threshold.
Figure 11 shows an application circuit for a typical pin-
strapped start-up sequence. Holding ON LOW for 400ms
brings up the WAKE pin that is tied to EN1 and EN3 to
enable step-down switching regulators 1 and 3. The output
of regulator 1 is tied to EN2 and EN4 which enable step-
down switching regulator 2 and the buck-boost switching
regulator 4. The output of step-down switching regulator 2
is tied to EN_LDO2 and EN_LDO34 to enable LDO2, LDO3
and LDO4. Within five seconds of WAKE going HIGH, the
microprocessor or microcontroller must drive PWR_ON
HIGH to tell LTC3589 that rails are good and to stay in
the power-on state.
WAKE
5 SEC
PWR_ON
µC/µP CONTROL
RSTO
1 SEC
3589 F09
Figure 9. Hard Reset Using the Pushbutton
FAULT
ON(PB)
PBSTAT
WAKE
<1 SEC
PWR_ON
LTC3589
EN1
WAKE
EN2
SW1
EN3
SW2
EN4
SW3
EN_LDO2 BB_OUT
EN_LDO34
LDO2
ON
LDO3
PWR_ON
LDO4
V_IN
1V TO 1.2V
1.8V
0.8V TO 1V
3.3V
1.2V
1.8V
2.8V
3589 F11
PWR_ON
IRQ
µC/µP CONTROL
Figure 11. Pin-Strap Start-Up Sequence Application Circuit
CLIRQ
3589 F10
Figure 10. Hard Reset Due to a Fault Condition
For more information www.linear.com/LTC3589
3589fg
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