LTC3589-2_15 Datasheet, PDF (18/50 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589/LTC3589-1/
LTC3589-2
OPERATION
undervoltage threshold in effect for the rest of the LTC3589
circuits. The always-on LDO is used to provide power to
a standby microcontroller, real-time clock, or other keep-
alive circuits. The LDO is guaranteed to support a 25mA
load. A 1µF low impedance ceramic bypass capacitor from
LDO1_STBY to GND is required for compensation. A power
good monitor pulls RSTO LOW for a minimum of 14ms
(typical) whenever LDO1_STBY is 8% below its regulation
target. An LDO1_STBY undervoltage condition is reported
in the PGOOD status register. The output voltage of LDO1
is set with a resistor divider connected from LDO1_STBY
to the feedback pin LDO1_FB, as shown in Figure 1.
V_{LDO1_ STBY} = 0.8 • ^{⎛⎝⎜}1+ _RR21^{⎞⎠⎟}(V)
Typical values for R1 are in the range of 40k to 1M.
LDO1_STBY is protected from short-circuits and
overloading.
0.8V ⁺
–
V_IN
LDO1_STBY
R1
1µF
LDO1_FB
3589 F01
R2
current limit protection circuits. Default operation for the
LTC3589 is when an LDO regulator is disabled, a 2.5k
pull-down resistor is connected to its output.
To help reduce LDO power loss in the system, the regulators
have dedicated supply inputs that may be lower than the
main V_IN supply. Connect a low ESR 1µF capacitor to each
of the output pins LDO2, LDO3, and LDO4.
LDO Regulator 2
One of the LTC3589 dynamic slewing DACs serves as the
reference input of LDO2. The output range of LDO2 is set
using an external resistor divider connected from LDO2
to the feedback pin LDO2_FB, as shown in Figure 2. Set
the output voltage of LDO2 using the following formula:
V_OUT
= ^{⎛⎝⎜}1+
R1^⎞
R2⎠⎟
•
(0.3625 + L2DTVx
•
0.0125)(V)
L2DTVx is the five bit word contained in the LDO2 dynamic
target voltage 1 (L2DTV1) or the LDO2 dynamic target
voltage 2 (L2DTV2) command registers. The default value
of L2DTVx[4-0] is 11001 to output a reference voltage of
0.675V. LDO2 is enabled by writing bit 4 in the output
voltage enable (OVEN) command register to 1 or driving
the EN_LDO2 pin high. Whenever the command is given to
slew LDO2 DAC reference to a lower voltage an integrated
2.5k pull-down resistor is connected to LDO2 output.
Figure 1. Always-On LDO Application Circuit
250mA LDO REGULATORS
Three LDO regulators on the LTC3589 will each deliver
up to 250mA output. The LDO regulators are enabled by
pin input or I²C command register. Pin EN_LDO2 enables
LDO2 and the LTC3589 EN_LDO34 pin enables LDO3 and
LDO4 together. An I²C command register bit is available to
decouple LDO4 from pin EN_LDO34 so that LDO4 is under
command register control only. The LTC3589-1/LTC3589-2
EN_LDO3 pin enables LDO3 only. LDO4 is controlled
using the I²C command registers. All the regulators have
0.3625V
TO 0.75V
PV_IN
EA
LDO2
R1
1µF
FB
R2
DAC
5
3589 F02
Figure 2. LDO2 Application Circuit
18
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