LTC3568_15 Datasheet, PDF (3/18 Pages) Linear Technology – 1.8A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3568
Electrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T_A = 25°C. V_IN = 3.3V, R_T = 324k unless otherwise specified. (Note 2)
f_OSC
Oscillator Frequency
R_T = 324k
(Note 7)
0.85
1
1.15
MHz
4
MHz
f_SYNC
I_LIM
R_DS(ON)
Synchronization Frequency
Peak Switch Current Limit
Top Switch On-Resistance (Note 6)
(Note 7)
I_TH = 1.3
V_IN = 3.3V
0.4
4
MHz
2.4
3
4
A
0.11
0.15
Ω
Bottom Switch On-Resistance (Note 6) V_IN = 3.3V
0.11
0.15
Ω
I_SW(LKG)
V_UVLO
PGOOD
RPGOOD
Switch Leakage Current
Undervoltage Lockout Threshold
Power Good Threshold
Power Good Pull-Down On-Resistance
V_IN = 6V, V_ITH/RUN = 0V, V_FB = 0V
V_IN Ramping Down
V_FB Ramping Up, SHDN/R_T = 1V
V_FB Ramping Down, SHDN/R_T = 1V
0.01
1
µA
2
2.25
V
6.8
%
–7.6
%
118
200
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3568 is tested under pulsed load conditions such that T_J =
T_A. The LTC3568E is guaranteed to meet performance specifications from
0°C to 85°C. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3568I is guaranteed over the
full –40°C to 125°C operating junction temperature range. The maximum
ambient temperature is determined by specific operating conditions in
conjunction with board layout, the rated package thermal resistors and
other environmental factors.
Note 3: The LTC3568 is tested in a feedback loop which servos V_FB to the
midpoint for the error amplifier (V_ITH = 0.6V).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T_J is calculated from the ambient T_A and power dissipation P_D
according to the following formula:
T_J = T_A + (P_D • 43°C/W)
Note 6: Switch on-resistance is guaranteed by correlation to wafer level
measurements.
Note 7: 4MHz operation is guaranteed by design but not production tested
and is subject to duty cycle limitations (see Applications Information).
Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3568fa