LTC3568_15 Datasheet, PDF (12/18 Pages) Linear Technology – 1.8A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3568
Applications Information
that will give a sense of the overall loop stability without
breaking the feedback loop.
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, V_OUT im-
mediately shifts by an amount equal to ΔI_LOAD • ESR, where
ESR is the effective series resistance of C_OUT. ΔI_LOAD also
begins to charge or discharge C_OUT generating a feedback
error signal used by the regulator to return V_OUT to its
steady-state value. During this recovery time, V_OUT can
be monitored for overshoot or ringing that would indicate
a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with R and
the bandwidth of the loop increases with decreasing C.
If R is increased by the same factor that C is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop. In addition, a feedforward capacitor
C_F can be added to improve the high frequency response,
as shown in Figure 5. Capacitor C_F provides phase lead by
creating a high frequency zero with R2 which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
Although a buck regulator is capable of providing the full
output current in dropout, it should be noted that as the
input voltage V_IN drops toward V_OUT, the load step capability
does decrease due to the decreasing voltage across the
inductor. Applications that require large load step capabil-
ity near dropout should use a different topology such as
SEPIC, Zeta or single inductor, positive buck/boost.
In some applications, a more severe transient can be caused
by switching in loads with large (>1uF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C_OUT, causing a rapid drop in V_OUT. No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the load
switch driver. A hot swap controller is designed specifically
for this purpose and usually incorporates current limiting,
short-circuit protection, and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
12
V_IN
2.5V
TO 5.5V
C6
PGND
+
C_IN
R6
C8
PGND
SV_IN
PV_IN PGOOD
SW
LTC3568
SGND
SYNC/MODE
I_TH
V_FB
SGND
C_ITH
R_C
SGND PGND SHDN/R_T
C_C
R5
PGOOD
L1 _CF
R1
R2
R_T
SGND SGND
GND
SGND SGND
Figure 5. LTC3568 General Schematic
+
C_OUT
V_OUT
C5
PGND
PGND
3568 F05
3568fa